Lines Matching +full:no +full:- +full:pc +full:- +full:write
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-xscale.S
25 #include <asm/pgtable-hwdef.h>
28 #include "proc-macros.S"
56 * Without this the XScale core exhibits cache eviction problems and no one
59 * Reminder: the vector table is located at 0xffff0000-0xffff0fff.
64 * This macro is used to wait for a CP15 write and is needed
65 * when we have to ensure that the last operation to the co-pro
71 sub pc, pc, #4 @ flush instruction pipeline
76 sub pc, \lr, \rd, LSR #32 @ wait for completion and
115 @ enable write buffer coalescing. Some bootloader disable it
147 mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB
148 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
152 sub pc, pc, #4 @ flush pipeline
216 mcrne p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
225 * - start - start address (may not be aligned)
226 * - end - end address (exclusive, may not be aligned)
227 * - vma - vma_area_struct describing address space
245 mcrne p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
252 * region described by start. If you have non-snooping
255 * - start - virtual start address
256 * - end - virtual end address
258 * Note: single I-cache line invalidation isn't used here since
259 * it also trashes the mini I-cache used by JTAG debuggers.
262 bic r0, r0, #CACHELINESIZE - 1
269 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
276 * region described by start. If you have non-snooping
279 * - start - virtual start address
280 * - end - virtual end address
283 bic r0, r0, #CACHELINESIZE - 1
291 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
297 * Ensure no D cache aliasing occurs, either with itself or
300 * - addr - kernel address
301 * - size - region size
312 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
319 * May not write back any entries. If 'start' or 'end'
323 * - start - virtual start address
324 * - end - virtual end address
327 tst r0, #CACHELINESIZE - 1
328 bic r0, r0, #CACHELINESIZE - 1
330 tst r1, #CACHELINESIZE - 1
336 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
344 * - start - virtual start address
345 * - end - virtual end address
348 bic r0, r0, #CACHELINESIZE - 1
353 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
361 * - start - virtual start address
362 * - end - virtual end address
365 bic r0, r0, #CACHELINESIZE - 1
371 mcr p15, 0, r0, c7, c10, 4 @ Drain Write (& Fill) Buffer
376 * - start - kernel virtual start address
377 * - size - size of region
378 * - dir - DMA direction
390 * - start - kernel virtual start address
391 * - size - size of region
392 * - dir - DMA direction
403 * - start - kernel virtual start address
404 * - size - size of region
405 * - dir - DMA direction
414 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
418 * On stepping A0/A1 of the 80200, invalidating D-cache by line doesn't
422 * The recommended workaround is to always do a clean D-cache line before
423 * doing an invalidate D-cache line, so on the affected processors,
451 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
474 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
484 * Errata 40: must set memory to write-through for user read-only pages.
509 @ Erratum 40: must set memory to write-through for user read-only pages
531 stmfd sp!, {r4 - r9, lr}
539 stmia r0, {r4 - r9} @ store cp regs
540 ldmfd sp!, {r4 - r9, pc}
544 ldmia r0, {r4 - r9} @ load cp regs
562 mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer
574 .size __xscale_setup, . - __xscale_setup
588 @ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
596 string cpu_80200_A0_A1_name, "XScale-80200 A0/A1"
597 string cpu_80200_name, "XScale-80200"
598 string cpu_80219_name, "XScale-80219"
599 string cpu_8032x_name, "XScale-IOP8032x Family"
600 string cpu_8033x_name, "XScale-IOP8033x Family"
601 string cpu_pxa250_name, "XScale-PXA250"
602 string cpu_pxa210_name, "XScale-PXA210"
603 string cpu_ixp42x_name, "XScale-IXP42x Family"
604 string cpu_ixp43x_name, "XScale-IXP43x Family"
605 string cpu_ixp46x_name, "XScale-IXP46x Family"
606 string cpu_ixp2400_name, "XScale-IXP2400"
607 string cpu_ixp2800_name, "XScale-IXP2800"
608 string cpu_pxa255_name, "XScale-PXA255"
609 string cpu_pxa270_name, "XScale-PXA270"
641 .size __\name\()_proc_info, . - __\name\()_proc_info