Lines Matching refs:c7
68 1: mcr p15, 0, \rd, c7, c14, 2 @ clean/invalidate L1 D line
113 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
118 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
137 mcr p14, 0, r0, c7, c0, 0 @ go to idle
149 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
173 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
174 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
175 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
196 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line
197 mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
202 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
203 mcrne p15, 0, ip, c7, c10, 4 @ data write barrier
204 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
224 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
229 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
230 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
231 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
245 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
250 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
251 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
252 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
269 mcrne p15, 0, r0, c7, c10, 1 @ clean L1 D line
271 mcrne p15, 0, r1, c7, c10, 1 @ clean L1 D line
272 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate L1 D line
276 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
289 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
293 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
306 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
310 mcr p15, 0, r0, c7, c10, 4 @ data write barrier
344 1: mcr p15, 0, r0, c7, c10, 1 @ clean L1 D line
362 mcr p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
363 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
364 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
367 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs
430 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
431 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
432 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
433 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
450 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
451 mcr p15, 0, ip, c7, c10, 4 @ data write barrier
452 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
453 mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs