Lines Matching +full:i +full:- +full:tlb +full:- +full:sets

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
8  *  hacked for non-paged-MM by Hyok S. Choi, 2004.
10  * These are the low level assembler for performing cache and TLB
15  *   05-09-2000 SJH	Created by moving 720 specific functions
16  *			out of 'proc-arm6,7.S' per RMK discussion
17  *   07-25-2000 SJH	Added idle function.
18  *   08-25-2000	DBS	Updated for integration of ARM Ltd version.
19  *   04-20-2004 HSC	modified for non-paged memory management mode.
25 #include <asm/asm-offsets.h>
27 #include <asm/pgtable-hwdef.h>
30 #include "proc-macros.S"
44 		bic	r0, r0, #0x1000			@ ...i............
68 		mcr	p15, 0, r1, c8, c7, 0		@ flush TLB (v4)
88  * Notes   : This sets up everything for a reset
95 		mcr	p15, 0, ip, c8, c7, 0		@ flush TLB (v4)
110 	mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
118 	.size	__arm710_setup, . - __arm710_setup
138 	mcr	p15, 0, r0, c8, c7, 0		@ flush TLB (v4)
146 	.size	__arm720_setup, . - __arm720_setup
159 	@ define struct processor (see <asm/proc-fns.h> and proc-macros.S)
201 		.size	__\name\()_proc_info, . - __\name\()_proc_info