Lines Matching full:r0
32 * r0 - set to 0
36 mov r0, #0
40 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
41 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
42 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
49 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
62 mov r0, #0
64 mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate
66 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
71 mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate
132 bic r0, r0, #CACHE_LINE_SIZE - 1
134 USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line
135 add r0, r0, #CACHE_LINE_SIZE
136 cmp r0, r1
139 mov r0, #0
141 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
143 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
148 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
153 * Fault handling for the cache operation above. If the virtual address in r0
157 mov r0, #-EFAULT
173 add r1, r0, r1
174 bic r0, r0, #D_CACHE_LINE_SIZE - 1
177 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
179 mcr p15, 0, r0, c7, c15, 1 @ clean & invalidate unified line
181 add r0, r0, #D_CACHE_LINE_SIZE
182 cmp r0, r1
185 mov r0, #0
186 mcr p15, 0, r0, c7, c10, 4
203 ldrb r2, [r0] @ read for ownership
204 strb r2, [r0] @ write for ownership
206 tst r0, #D_CACHE_LINE_SIZE - 1
207 bic r0, r0, #D_CACHE_LINE_SIZE - 1
209 mcrne p15, 0, r0, c7, c10, 1 @ clean D line
211 mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
226 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
228 mcr p15, 0, r0, c7, c7, 1 @ invalidate unified line
230 add r0, r0, #D_CACHE_LINE_SIZE
231 cmp r0, r1
233 ldrlo r2, [r0] @ read for ownership
234 strlo r2, [r0] @ write for ownership
237 mov r0, #0
238 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
247 bic r0, r0, #D_CACHE_LINE_SIZE - 1
250 ldr r2, [r0] @ read for ownership
253 mcr p15, 0, r0, c7, c10, 1 @ clean D line
255 mcr p15, 0, r0, c7, c11, 1 @ clean unified line
257 add r0, r0, #D_CACHE_LINE_SIZE
258 cmp r0, r1
260 mov r0, #0
261 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
271 ldrb r2, [r0] @ read for ownership
272 strb r2, [r0] @ write for ownership
274 bic r0, r0, #D_CACHE_LINE_SIZE - 1
277 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
279 mcr p15, 0, r0, c7, c15, 1 @ clean & invalidate line
281 add r0, r0, #D_CACHE_LINE_SIZE
282 cmp r0, r1
284 ldrblo r2, [r0] @ read for ownership
285 strblo r2, [r0] @ write for ownership
288 mov r0, #0
289 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
299 add r1, r1, r0
319 add r1, r1, r0