Lines Matching +full:8 +full:xxx

35 #define IDLAPI_ARM_SHIFT			8
54 #define OTG_SYSCON_2_UHOST_EN_SHIFT		8
62 #define SOFT_USB_OTG_DPLL_REQ_SHIFT	8
360  * XXX The enable_bit here is misused - it simply switches between 12MHz
363  * XXX does this need SYSC register handling?
377  * XXX The enable_bit here is misused - it simply switches between 12MHz
380  * XXX SYSC register handling does not belong in the clock framework
396  * XXX The enable_bit here is misused - it simply switches between 12MHz
399  * XXX does this need SYSC register handling?
413  * XXX The enable_bit here is misused - it simply switches between 12MHz
416  * XXX does this need SYSC register handling?
430  * XXX The enable_bit here is misused - it simply switches between 12MHz
433  * XXX SYSC register handling does not belong in the clock framework
554  * XXX MOD_CONF_CTRL_0 bit 20 is defined in the 1510 TRM as
799 	 * According to OMAP5910 Erratum SYS_DMA_1, bit DMACK_REQ (bit 8)  in omap1_clk_init()