Lines Matching +full:0 +full:x101f8000
30 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */
31 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */
32 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */
33 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */
34 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */
35 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */
36 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */
37 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */
38 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */
39 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */
40 #define NOMADIK_XTI_BASE 0x101A0000 /* XTI */
41 #define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */
42 #define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */
43 #define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */
44 #define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */
45 #define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */
46 #define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */
47 #define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */
48 #define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */
49 #define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */
50 #define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */
51 #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */
52 #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */
53 #define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */
54 #define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */
55 #define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */
56 #define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */
57 #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */
58 #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */
59 #define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */
60 #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */
61 #define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */
62 #define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */
63 #define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */
64 #define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */
65 #define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */
66 #define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */
67 #define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */
68 #define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */
69 #define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */
70 #define NOMADIK_UART1_VBASE 0xF01FB000
94 writel(1, srcbase + 0x18); in cpu8815_restart()
104 .l2c_aux_val = 0,
105 .l2c_aux_mask = ~0,