Lines Matching full:lr
98 ARM( stmib sp, {r1 - lr} )
101 THUMB( str lr, [sp, #S_LR] )
185 mov r3, lr
240 mov r8, lr
319 mov r1, lr @ Save lr_abt
333 mov lr, r1 @ Restore lr_abt, abort is unsafe
380 ARM( stmdb r0, {sp, lr}^ )
457 @ instruction, or the more conventional lr if we are to treat
469 sub r4, r2, #4 @ ARM instr at LR - 4
478 @ lr = 32-bit undefined instruction function
479 badr lr, __und_usr_fault_32
484 sub r4, r2, #2 @ First half of thumb instr at LR - 2
514 badr lr, __und_usr_fault_32
518 @ lr = 32bit undefined instruction function
572 * lr = unrecognised instruction return address
602 reteq lr
619 ret.w lr @ CP#0
622 ret.w lr @ CP#3
623 ret.w lr @ CP#4
624 ret.w lr @ CP#5
625 ret.w lr @ CP#6
626 ret.w lr @ CP#7
627 ret.w lr @ CP#8
628 ret.w lr @ CP#9
633 ret.w lr @ CP#10 (VFP)
634 ret.w lr @ CP#11 (VFP)
636 ret.w lr @ CP#12
637 ret.w lr @ CP#13
638 ret.w lr @ CP#14 (Debug)
639 ret.w lr @ CP#15 (Control)
675 * lr = unrecognised FP instruction return address
685 ret lr
696 badr lr, ret_from_exception
741 ARM( stmia ip!, {r4 - sl, fp, sp, lr} ) @ Store most regs on stack
744 THUMB( str lr, [ip], #4 )
782 ldmia r4, {r4 - sl, fp, ip, lr} @ Load all regs saved previously
802 ret lr
832 push {fp, ip, lr, pc} @ GCC flavor frame record
835 push {fpreg, lr} @ Clang flavor frame record
837 UNWIND( ldr ip, [r0, #4] ) @ load exception LR
845 UNWIND( .save {fpreg, lr} )
928 usr_ret lr
940 stmfd sp!, {r4, r5, r6, lr}
942 ldmia r1, {r6, lr} @ load new val
946 2: stmiaeq r2, {r6, lr} @ store newval if eq
965 ret lr
972 usr_ret lr
983 usr_ret lr
1006 usr_ret lr
1020 ret lr
1027 usr_ret lr
1041 ALT_UP(usr_ret lr)
1049 usr_ret lr
1074 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
1084 @ isb not needed due to "movs pc, lr" in the vector stub
1090 sub lr, lr, #\correction
1094 stmia sp, {r0, lr} @ save r0, lr
1098 mrs lr, spsr
1099 str lr, [sp, #8] @ save spsr
1111 and lr, lr, #0x0f
1113 THUMB( ldr lr, [r0, lr, lsl #2] )
1115 ARM( ldr lr, [pc, lr, lsl #2] )
1116 movs pc, lr @ branch to handler in SVC mode
1124 sub lr, lr, #\correction
1128 stmia sp, {r0, lr}
1136 @ isb not needed due to "movs pc, lr" in the vector stub
1191 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
1214 * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
1237 * Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC