Lines Matching +full:fiq +full:- +full:based

1 /* SPDX-License-Identifier: GPL-2.0-only */
5  *  Copyright (C) 1996-2003 Russell King
27 	(((regs)->ARM_cpsr & 0xf) == 0)
31 	(((regs)->ARM_cpsr & PSR_T_BIT))
38 	((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
39 	 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
45 	((regs)->ARM_cpsr & MODE_MASK)
48 	(!((regs)->ARM_cpsr & PSR_I_BIT))
51 	(!((regs)->ARM_cpsr & PSR_F_BIT))
59 	unsigned long mode = regs->ARM_cpsr & MODE_MASK;  in valid_user_regs()
62 	 * Always clear the F (FIQ) and A (delayed abort) bits  in valid_user_regs()
64 	regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);  in valid_user_regs()
66 	if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {  in valid_user_regs()
76 	regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;  in valid_user_regs()
78 		regs->ARM_cpsr |= USR_MODE;  in valid_user_regs()
88 	return regs->ARM_r0;  in regs_return_value()
91 #define instruction_pointer(regs)	(regs)->ARM_pc
94 #define frame_pointer(regs) (regs)->ARM_r7
96 #define frame_pointer(regs) (regs)->ARM_fp
115  * True if instr is a 32-bit thumb instruction. This works if instr
116  * is the first or only half-word of a thumb instruction. It also works
117  * when instr holds all 32-bits of a wide thumb instruction if stored
123  * kprobe-based event tracer support
135  * regs_get_register() - get register value from its offset
154 	return regs->ARM_sp;  in kernel_stack_pointer()
159 	return regs->ARM_sp;  in user_stack_pointer()
163 		((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1;	\
184 		it |= it >> (27 - 10);  /* Carry ITSTATE<2> to correct place */  in it_advance()