Lines Matching +full:cortex +full:- +full:m
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
29 // M_0-M_3 are occasionally used for other purposes too.
50 // rotation amounts with NEON. (On Cortex-A53 it's the same speed as
51 // vshr.u64 + vsli.u64, while on Cortex-A7 it's faster.)
64 // NEON registers q0-q7. The message block is in q8..q15 (M_0-M_15). The stack
65 // pointer points to a 32-byte aligned buffer containing a copy of q8 and q9
66 // (M_0-M_3), so that they can be reloaded if they are used as temporary
67 // registers. The macro arguments s0-s15 give the order in which the message
76 // a += b + m[blake2b_sigma[r][2*i + 0]];
103 // a += b + m[blake2b_sigma[r][2*i + 1]];
135 // registers. Use q8-q9 (M_0-M_3) for this, and reload them afterwards.
142 vld1.8 {q8-q9}, [sp, :256]
150 // and undo it afterwards; or just use 64-bit operations on 'd'
151 // registers instead of 128-bit operations on 'q' registers. We use the
152 // latter approach, as it performs much better on Cortex-A7.
154 // a += b + m[blake2b_sigma[r][2*i + 0]];
191 // a += b + m[blake2b_sigma[r][2*i + 1]];
230 // Reloading q8-q9 can be skipped on the final round.
232 vld1.8 {q8-q9}, [sp, :256]
247 push {r4-r10}
249 // Allocate a 32-byte stack buffer that is 32-byte aligned.
259 vld1.64 {q0-q1}, [ip]! // Load h[0..3]
260 vld1.64 {q2-q3}, [ip]! // Load h[4..7]
263 vld1.64 {q14-q15}, [ip] // Load t[0..1] and f[0..1]
264 vld1.64 {q4-q5}, [r10]! // Load IV[0..3]
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
275 // entire state matrix in q0-q7 and the entire message block in q8-15.
281 // (q8-q9) in an aligned buffer on the stack so that they can be
284 vld1.8 {q8-q9}, [BLOCK]!
286 vld1.8 {q10-q11}, [BLOCK]!
288 vld1.8 {q12-q13}, [BLOCK]!
289 vst1.8 {q8-q9}, [sp, :256]
291 vld1.8 {q14-q15}, [BLOCK]!
314 vld1.64 {q8-q9}, [ip]! // Load old h[0..3]
317 vld1.64 {q10-q11}, [ip] // Load old h[4..7]
323 subs NBLOCKS, NBLOCKS, #1 // nblocks--
324 vst1.64 {q0-q1}, [ip]! // Store new h[0..3]
327 vst1.64 {q2-q3}, [ip]! // Store new h[4..7]
333 pop {r4-r10}
338 // carrying the overflow bit into the full 128-bit counter.