Lines Matching +full:0 +full:x21a2
15 pinctrl-0 = <&pinctrl_mdio_mux>;
22 #size-cells = <0>;
27 #size-cells = <0>;
29 switch0: switch@0 {
31 pinctrl-0 = <&pinctrl_gpio_switch0>;
33 reg = <0>;
34 dsa,member = <0 0>;
43 #size-cells = <0>;
45 port@0 {
46 reg = <0>;
90 #size-cells = <0>;
122 #size-cells = <0>;
124 switch1: switch@0 {
126 pinctrl-0 = <&pinctrl_gpio_switch1>;
128 reg = <0>;
129 dsa,member = <0 1>;
138 #size-cells = <0>;
181 #size-cells = <0>;
213 #size-cells = <0>;
235 bus-num = <0>;
237 pinctrl-0 = <&pinctrl_dspi0>;
241 flash@0 {
245 reg = <0>;
253 pinctrl-0 = <&pinctr_atzb_rf_233>;
259 xtal-trim = /bits/ 8 <0x06>;
279 reg = <0x18>;
308 pinctrl-0 = <&pinctrl_sx1503_20>;
311 reg = <0x20>;
327 reg = <0x22>;
337 reg = <0x50>;
345 pinctrl-0 = <&pinctrl_i2c_mux_reset>;
348 #size-cells = <0>;
349 reg = <0x70>;
352 i2c@0 {
354 #size-cells = <0>;
355 reg = <0>;
360 #size-cells = <0>;
366 #size-cells = <0>;
372 #size-cells = <0>;
380 pinctrl-0 = <&pinctrl_uart3>;
405 #size-cells = <0>;
408 ethernet-phy@0 {
412 pinctrl-0 = <&pinctrl_fec0_phy_int>;
416 reg = <0>;
424 VF610_PAD_PTB2__GPIO_24 0x31c2
425 VF610_PAD_PTE27__GPIO_132 0x33e2
432 VF610_PAD_PTB1__GPIO_23 0x219d
438 VF610_PAD_PTA20__UART3_TX 0x21a2
439 VF610_PAD_PTA21__UART3_RX 0x21a1
445 VF610_PAD_PTA18__GPIO_8 0x31c2
446 VF610_PAD_PTA19__GPIO_9 0x31c2
447 VF610_PAD_PTB3__GPIO_25 0x31c2
453 VF610_PAD_PTB28__GPIO_98 0x219d