Lines Matching +full:0 +full:x21a2
18 reg = <0x80000000 0x8000000>;
23 #clock-cells = <0>;
29 #clock-cells = <0>;
36 #size-cells = <0>;
38 reg_3p3v: regulator@0 {
40 reg = <0>;
87 pinctrl-0 = <&pinctrl_adc0_ad5>;
102 bus-num = <0>;
104 pinctrl-0 = <&pinctrl_dspi0>;
107 sflash: at26df081a@0 {
114 reg = <0>;
124 pinctrl-0 = <&pinctrl_esdhc1>;
134 pinctrl-0 = <&pinctrl_fec0>;
139 #size-cells = <0>;
141 ethphy0: ethernet-phy@0 {
142 reg = <0>;
155 pinctrl-0 = <&pinctrl_fec1>;
162 pinctrl-0 = <&pinctrl_i2c0>;
166 #sound-dai-cells = <0>;
168 reg = <0x0a>;
179 VF610_PAD_PTC30__ADC0_SE5 0xa1
185 VF610_PAD_PTB19__DSPI0_CS0 0x1182
186 VF610_PAD_PTB20__DSPI0_SIN 0x1181
187 VF610_PAD_PTB21__DSPI0_SOUT 0x1182
188 VF610_PAD_PTB22__DSPI0_SCK 0x1182
194 VF610_PAD_PTA24__ESDHC1_CLK 0x31ef
195 VF610_PAD_PTA25__ESDHC1_CMD 0x31ef
196 VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef
197 VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef
198 VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef
199 VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef
200 VF610_PAD_PTA7__GPIO_134 0x219d
206 VF610_PAD_PTA6__RMII_CLKIN 0x30d1
207 VF610_PAD_PTC0__ENET_RMII0_MDC 0x30d3
208 VF610_PAD_PTC1__ENET_RMII0_MDIO 0x30d1
209 VF610_PAD_PTC2__ENET_RMII0_CRS 0x30d1
210 VF610_PAD_PTC3__ENET_RMII0_RXD1 0x30d1
211 VF610_PAD_PTC4__ENET_RMII0_RXD0 0x30d1
212 VF610_PAD_PTC5__ENET_RMII0_RXER 0x30d1
213 VF610_PAD_PTC6__ENET_RMII0_TXD1 0x30d2
214 VF610_PAD_PTC7__ENET_RMII0_TXD0 0x30d2
215 VF610_PAD_PTC8__ENET_RMII0_TXEN 0x30d2
221 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2
222 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3
223 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1
224 VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1
225 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1
226 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1
227 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
228 VF610_PAD_PTC16__ENET_RMII1_TXD0 0x30d2
229 VF610_PAD_PTC17__ENET_RMII1_TXEN 0x30d2
235 VF610_PAD_PTB14__I2C0_SCL 0x30d3
236 VF610_PAD_PTB15__I2C0_SDA 0x30d3
242 VF610_PAD_PTD31__NF_IO15 0x28df
243 VF610_PAD_PTD30__NF_IO14 0x28df
244 VF610_PAD_PTD29__NF_IO13 0x28df
245 VF610_PAD_PTD28__NF_IO12 0x28df
246 VF610_PAD_PTD27__NF_IO11 0x28df
247 VF610_PAD_PTD26__NF_IO10 0x28df
248 VF610_PAD_PTD25__NF_IO9 0x28df
249 VF610_PAD_PTD24__NF_IO8 0x28df
250 VF610_PAD_PTD23__NF_IO7 0x28df
251 VF610_PAD_PTD22__NF_IO6 0x28df
252 VF610_PAD_PTD21__NF_IO5 0x28df
253 VF610_PAD_PTD20__NF_IO4 0x28df
254 VF610_PAD_PTD19__NF_IO3 0x28df
255 VF610_PAD_PTD18__NF_IO2 0x28df
256 VF610_PAD_PTD17__NF_IO1 0x28df
257 VF610_PAD_PTD16__NF_IO0 0x28df
258 VF610_PAD_PTB24__NF_WE_B 0x28c2
259 VF610_PAD_PTB25__NF_CE0_B 0x28c2
260 VF610_PAD_PTB27__NF_RE_B 0x28c2
261 VF610_PAD_PTC26__NF_RB_B 0x283d
262 VF610_PAD_PTC27__NF_ALE 0x28c2
263 VF610_PAD_PTC28__NF_CLE 0x28c2
269 VF610_PAD_PTB0__FTM0_CH0 0x1582
270 VF610_PAD_PTB1__FTM0_CH1 0x1582
271 VF610_PAD_PTB2__FTM0_CH2 0x1582
272 VF610_PAD_PTB3__FTM0_CH3 0x1582
278 VF610_PAD_PTA16__SAI2_TX_BCLK 0x02ed
279 VF610_PAD_PTA18__SAI2_TX_DATA 0x02ee
280 VF610_PAD_PTA19__SAI2_TX_SYNC 0x02ed
281 VF610_PAD_PTA21__SAI2_RX_BCLK 0x02ed
282 VF610_PAD_PTA22__SAI2_RX_DATA 0x02ed
283 VF610_PAD_PTA23__SAI2_RX_SYNC 0x02ed
284 VF610_PAD_PTB18__EXT_AUDIO_MCLK 0x02ed
290 VF610_PAD_PTB4__UART1_TX 0x21a2
291 VF610_PAD_PTB5__UART1_RX 0x21a1
297 VF610_PAD_PTB6__UART2_TX 0x21a2
298 VF610_PAD_PTB7__UART2_RX 0x21a1
308 pinctrl-0 = <&pinctrl_nfc>;
311 nand@0 {
313 reg = <0>;
326 pinctrl-0 = <&pinctrl_pwm0>;
331 #sound-dai-cells = <0>;
333 pinctrl-0 = <&pinctrl_sai2>;
339 pinctrl-0 = <&pinctrl_uart1>;
345 pinctrl-0 = <&pinctrl_uart2>;