Lines Matching +full:0 +full:x10020000
16 arm,hbi = <0x191>;
17 arm,vexpress,site = <0xf>;
36 #size-cells = <0>;
38 A9_0: cpu@0 {
41 reg = <0>;
69 reg = <0x60000000 0x40000000>;
77 /* Chipselect 3 is physically at 0x4c000000 */
81 reg = <0x4c000000 0x00800000>;
88 reg = <0x10020000 0x1000>;
90 interrupts = <0 44 4>;
99 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
106 reg = <0x100e0000 0x1000>;
113 reg = <0x100e1000 0x1000>;
114 interrupts = <0 45 4>,
115 <0 46 4>;
122 reg = <0x100e4000 0x1000>;
123 interrupts = <0 48 4>,
124 <0 49 4>;
132 reg = <0x100e5000 0x1000>;
133 interrupts = <0 51 4>;
140 reg = <0x1e000000 0x58>;
145 reg = <0x1e000600 0x20>;
146 interrupts = <1 13 0xf04>;
151 reg = <0x1e000620 0x20>;
152 interrupts = <1 14 0xf04>;
158 #address-cells = <0>;
160 reg = <0x1e001000 0x1000>,
161 <0x1e000100 0x100>;
166 reg = <0x1e00a000 0x1000>;
167 interrupts = <0 43 4>;
176 interrupts = <0 60 4>,
177 <0 61 4>,
178 <0 62 4>,
179 <0 63 4>;
191 arm,vexpress-sysreg,func = <1 0>;
193 #clock-cells = <0>;
202 #clock-cells = <0>;
211 #clock-cells = <0>;
218 arm,vexpress-sysreg,func = <2 0>;
272 arm,vexpress-sysreg,func = <3 0>;
286 arm,vexpress-sysreg,func = <12 0>;
302 ranges = <0 0xe0000000 0x20000000>;
304 interrupt-map-mask = <0 3>;
305 interrupt-map = <0 0 &gic 0 36 4>,
306 <0 1 &gic 0 37 4>,
307 <0 2 &gic 0 38 4>,
308 <0 3 &gic 0 39 4>;