Lines Matching +full:regulator +full:- +full:coupled +full:- +full:with
1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <®_1v8_avdd_hdmi_pll>;
19 vdd-supply = <®_3v3_avdd_hdmi>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
28 /* Analogue Audio (On-module) */
29 clk1-out-pw4 {
34 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 dap3-fs-pp0 {
47 gmi-ad0-pg0 {
91 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
94 dap4-din-pp5 {
111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
113 lcd-d18-pm2 {
125 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127 lcd-cs0-n-pn4 {
142 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
144 lcd-pwr0-pb2 {
152 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
161 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
164 lcd-cs1-n-pw0 {
169 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
177 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
179 /* Tri-stating GMI_WR_N on nPWE SODIMM pin 99 */
180 sdmmc3-dat4-pd1 {
185 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
187 /* Not tri-stating GMI_WR_N on RDnWR SODIMM pin 93 */
188 sdmmc3-dat5-pd0 {
193 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
205 sdmmc3-dat3-pb4 {
213 kb-row8-ps0 {
218 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
222 ddc-scl-pv4 {
228 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232 gen2-i2c-scl-pt5 {
236 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
239 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241 spdif-in-pk6 {
246 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
250 clk2-out-pw5 {
258 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260 lcd-pwr1-pc1 {
267 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
280 hdmi-int-pn7 {
285 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
289 gen1-i2c-scl-pc4 {
295 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
296 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
300 lcd-d0-pe0 {
326 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
329 * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE
332 lcd-m1-pw1 {
337 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
341 kb-row10-ps2 {
347 kb-row11-ps3 {
358 gmi-wp-n-pc7 {
363 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
366 cam-mclk-pcc0 {
371 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373 cam-i2c-scl-pbb1 {
379 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
380 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
388 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
395 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
399 gmi-rst-n-pi4 {
408 * pins multiplexed with others and therefore disabled
410 vi-vsync-pd6 {
430 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
434 sdmmc3-dat2-pb5 {
442 sdmmc3-clk-pa6 {
450 sdmmc3-cmd-pa7 {
458 ulpi-clk-py0 {
468 sdmmc3-dat6-pd3 {
474 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
477 /* Colibri UART-A */
478 ulpi-data0 {
492 /* Colibri UART-B */
493 gmi-a16-pj7 {
503 /* Colibri UART-C */
504 uart2-rxd {
513 spdif-out-pk5 {
518 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522 spi2-cs1-n-pw2 {
530 spi2-cs2-n-pw3 {
535 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
539 crt-hsync-pv6 {
545 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
548 /* eMMC (On-module) */
549 sdmmc4-clk-pcc4 {
556 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
558 sdmmc4-dat0-paa0 {
570 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
573 /* LAN_EXT_WAKEUP#, LAN_PME (On-module) */
574 pex-l0-rst-n-pdd1 {
580 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
582 /* LAN_V_BUS, LAN_RESET# (On-module) */
583 pex-l0-clkreq-n-pdd2 {
589 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
593 pex-l2-rst-n-pcc6 {
599 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
603 clk1-req-pee2 {
609 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
611 clk2-req-pcc5 {
621 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
623 gmi-dqs-pi2 {
633 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
635 kb-col0-pq0 {
647 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
649 kb-row0-pr0 {
657 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
659 lcd-pwr2-pc6 {
664 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
667 /* Power I2C (On-module) */
668 pwr-i2c-scl-pz6 {
674 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
675 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
683 lcd-dc1-pd2 {
688 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
691 /* TOUCH_PEN_INT# (On-module) */
697 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
703 compatible = "nvidia,tegra30-hsuart";
704 /delete-property/ reg-shift;
708 compatible = "nvidia,tegra30-hsuart";
709 /delete-property/ reg-shift;
713 clock-frequency = <10000>;
718 * touch screen controller (On-module)
722 clock-frequency = <100000>;
728 #sound-dai-cells = <0>;
729 VDDA-supply = <®_module_3v3_audio>;
730 VDDD-supply = <®_1v8_vio>;
731 VDDIO-supply = <®_module_3v3>;
740 #interrupt-cells = <2>;
741 interrupt-controller;
742 wakeup-source;
744 ti,system-power-controller;
746 #gpio-cells = <2>;
747 gpio-controller;
749 vcc1-supply = <®_module_3v3>;
750 vcc2-supply = <®_module_3v3>;
751 vcc3-supply = <®_1v8_vio>;
752 vcc4-supply = <®_module_3v3>;
753 vcc5-supply = <®_module_3v3>;
754 vcc6-supply = <®_1v8_vio>;
755 vcc7-supply = <®_5v0_charge_pump>;
756 vccio-supply = <®_module_3v3>;
760 regulator-name = "+V1.35_VDDIO_DDR";
761 regulator-min-microvolt = <1350000>;
762 regulator-max-microvolt = <1350000>;
763 regulator-always-on;
769 regulator-name = "+V1.0_VDD_CPU";
770 regulator-min-microvolt = <800000>;
771 regulator-max-microvolt = <1250000>;
772 regulator-coupled-with = <&vdd_core>;
773 regulator-coupled-max-spread = <300000>;
774 regulator-max-step-microvolt = <100000>;
775 regulator-always-on;
777 nvidia,tegra-cpu-regulator;
781 regulator-name = "+V1.8";
782 regulator-min-microvolt = <1800000>;
783 regulator-max-microvolt = <1800000>;
784 regulator-always-on;
795 regulator-name = "EN_+V3.3";
796 regulator-min-microvolt = <3300000>;
797 regulator-max-microvolt = <3300000>;
798 regulator-always-on;
804 regulator-name = "+V1.2_VDD_RTC";
805 regulator-min-microvolt = <1200000>;
806 regulator-max-microvolt = <1200000>;
807 regulator-always-on;
815 regulator-name = "+V2.8_AVDD_VDAC";
816 regulator-min-microvolt = <2800000>;
817 regulator-max-microvolt = <2800000>;
818 regulator-always-on;
827 regulator-name = "+V1.05_AVDD_PLLE";
828 regulator-min-microvolt = <1100000>;
829 regulator-max-microvolt = <1100000>;
833 regulator-name = "+V1.2_AVDD_PLL";
834 regulator-min-microvolt = <1200000>;
835 regulator-max-microvolt = <1200000>;
836 regulator-always-on;
840 regulator-name = "+V1.0_VDD_DDR_HS";
841 regulator-min-microvolt = <1000000>;
842 regulator-max-microvolt = <1000000>;
843 regulator-always-on;
852 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
853 interrupt-controller;
856 irq-trigger = <0x1>;
858 st,adc-freq = <1>;
859 /* 12-bit ADC */
860 st,mod-12b = <1>;
862 st,ref-sel = <0>;
864 st,sample-time = <4>;
865 /* forbid to use ADC channels 3-0 (touch) */
868 compatible = "st,stmpe-ts";
870 st,ave-ctrl = <3>;
872 st,fraction-z = <7>;
877 st,i-drive = <1>;
881 st,touch-det-delay = <5>;
885 compatible = "st,stmpe-adc";
886 st,norequest-mask = <0x0F>;
894 temp-sensor@4c {
900 vdd_core: regulator@60 {
904 regulator-name = "tps62362-vout";
905 regulator-min-microvolt = <900000>;
906 regulator-max-microvolt = <1400000>;
907 regulator-coupled-with = <&vddctrl_reg>;
908 regulator-coupled-max-spread = <300000>;
909 regulator-max-step-microvolt = <100000>;
910 regulator-boot-on;
911 regulator-always-on;
913 nvidia,tegra-core-regulator;
918 nvidia,invert-interrupt;
919 nvidia,suspend-mode = <1>;
920 nvidia,cpu-pwr-good-time = <5000>;
921 nvidia,cpu-pwr-off-time = <5000>;
922 nvidia,core-pwr-good-time = <3845 3845>;
923 nvidia,core-pwr-off-time = <0>;
924 nvidia,core-power-req-active-high;
925 nvidia,sys-clock-req-active-high;
926 core-supply = <&vdd_core>;
929 i2c-thermtrip {
930 nvidia,i2c-controller-id = <4>;
931 nvidia,bus-addr = <0x2d>;
932 nvidia,reg-addr = <0x3f>;
933 nvidia,reg-data = <0x1>;
950 bus-width = <8>;
951 non-removable;
952 vmmc-supply = <®_module_3v3>; /* VCC */
953 vqmmc-supply = <®_1v8_vio>; /* VCCQ */
954 mmc-ddr-1_8v;
957 /* EHCI instance 1: USB2_DP/N -> AX88772B (On-module) */
960 #address-cells = <1>;
961 #size-cells = <0>;
966 local-mac-address = [00 00 00 00 00 00];
970 usb-phy@7d004000 {
972 vbus-supply = <®_lan_v_bus>;
976 compatible = "fixed-clock";
977 #clock-cells = <0>;
978 clock-frequency = <32768>;
981 reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
982 compatible = "regulator-fixed";
983 regulator-name = "+V1.8_AVDD_HDMI_PLL";
984 regulator-min-microvolt = <1800000>;
985 regulator-max-microvolt = <1800000>;
986 enable-active-high;
988 vin-supply = <®_1v8_vio>;
991 reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
992 compatible = "regulator-fixed";
993 regulator-name = "+V3.3_AVDD_HDMI";
994 regulator-min-microvolt = <3300000>;
995 regulator-max-microvolt = <3300000>;
996 enable-active-high;
998 vin-supply = <®_module_3v3>;
1001 reg_5v0_charge_pump: regulator-5v0-charge-pump {
1002 compatible = "regulator-fixed";
1003 regulator-name = "+V5.0";
1004 regulator-min-microvolt = <5000000>;
1005 regulator-max-microvolt = <5000000>;
1006 regulator-always-on;
1009 reg_lan_v_bus: regulator-lan-v-bus {
1010 compatible = "regulator-fixed";
1011 regulator-name = "LAN_V_BUS";
1012 regulator-min-microvolt = <5000000>;
1013 regulator-max-microvolt = <5000000>;
1014 enable-active-high;
1018 reg_module_3v3: regulator-module-3v3 {
1019 compatible = "regulator-fixed";
1020 regulator-name = "+V3.3";
1021 regulator-min-microvolt = <3300000>;
1022 regulator-max-microvolt = <3300000>;
1023 regulator-always-on;
1026 reg_module_3v3_audio: regulator-module-3v3-audio {
1027 compatible = "regulator-fixed";
1028 regulator-name = "+V3.3_AUDIO_AVDD_S";
1029 regulator-min-microvolt = <3300000>;
1030 regulator-max-microvolt = <3300000>;
1031 regulator-always-on;
1035 compatible = "toradex,tegra-audio-sgtl5000-colibri_t30",
1036 "nvidia,tegra-audio-sgtl5000";
1038 nvidia,audio-routing =
1042 nvidia,i2s-controller = <&tegra_i2s2>;
1043 nvidia,audio-codec = <&sgtl5000>;
1047 clock-names = "pll_a", "pll_a_out0", "mclk";
1049 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1052 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1058 lan-reset-n-hog {
1059 gpio-hog;
1061 output-high;
1062 line-name = "LAN_RESET#";