Lines Matching +full:reset +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
15 interrupt-parent = <&lic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "nvidia,tegra124-pcie";
30 reg-names = "pads", "afi", "cs";
33 interrupt-names = "intr", "msi";
35 #interrupt-cells = <1>;
36 interrupt-map-mask = <0 0 0 0>;
37 interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
39 bus-range = <0x00 0xff>;
40 #address-cells = <3>;
41 #size-cells = <2>;
46 <0x02000000 0 0x13000000 0x0 0x13000000 0 0x0d000000>, /* non-prefetchable memory (208 MiB) */
53 clock-names = "pex", "afi", "pll_e", "cml";
57 reset-names = "pex", "afi", "pcie_x";
62 assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
64 bus-range = <0x00 0xff>;
67 #address-cells = <3>;
68 #size-cells = <2>;
71 nvidia,num-lanes = <2>;
76 assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
78 bus-range = <0x00 0xff>;
81 #address-cells = <3>;
82 #size-cells = <2>;
85 nvidia,num-lanes = <1>;
90 compatible = "nvidia,tegra124-host1x";
94 interrupt-names = "syncpt", "host1x";
96 clock-names = "host1x";
98 reset-names = "host1x", "mc";
101 #address-cells = <2>;
102 #size-cells = <2>;
107 compatible = "nvidia,tegra124-dc";
111 clock-names = "dc";
113 reset-names = "dc";
125 interconnect-names = "wina",
134 compatible = "nvidia,tegra124-dc";
138 clock-names = "dc";
140 reset-names = "dc";
150 interconnect-names = "wina",
157 compatible = "nvidia,tegra124-hdmi";
162 clock-names = "hdmi", "parent";
164 reset-names = "hdmi";
169 compatible = "nvidia,tegra124-vic";
173 clock-names = "vic";
175 reset-names = "vic";
181 compatible = "nvidia,tegra124-sor";
189 clock-names = "sor", "out", "parent", "dp", "safe";
191 reset-names = "sor";
196 compatible = "nvidia,tegra124-dpaux";
201 clock-names = "dpaux", "parent";
203 reset-names = "dpaux";
206 i2c-bus {
207 #address-cells = <1>;
208 #size-cells = <0>;
213 gic: interrupt-controller@50041000 {
214 compatible = "arm,cortex-a15-gic";
215 #interrupt-cells = <3>;
216 interrupt-controller;
223 interrupt-parent = <&gic>;
232 interrupt-names = "stall", "nonstall";
235 clock-names = "gpu", "pwr";
237 reset-names = "gpu";
244 lic: interrupt-controller@60004000 {
245 compatible = "nvidia,tegra124-ictlr", "nvidia,tegra30-ictlr";
251 interrupt-controller;
252 #interrupt-cells = <3>;
253 interrupt-parent = <&gic>;
257 compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer";
269 compatible = "nvidia,tegra124-car";
271 #clock-cells = <1>;
272 #reset-cells = <1>;
273 nvidia,external-memory-controller = <&emc>;
276 flow-controller@60007000 {
277 compatible = "nvidia,tegra124-flowctrl";
282 compatible = "nvidia,tegra124-actmon";
287 clock-names = "actmon", "emc";
289 reset-names = "actmon";
290 operating-points-v2 = <&emc_bw_dfs_opp_table>;
292 interconnect-names = "cpu-read";
293 #cooling-cells = <2>;
297 compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
307 #gpio-cells = <2>;
308 gpio-controller;
309 #interrupt-cells = <2>;
310 interrupt-controller;
311 gpio-ranges = <&pinmux 0 0 251>;
315 compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
351 reset-names = "dma";
352 #dma-cells = <1>;
356 compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
362 compatible = "nvidia,tegra124-pinmux";
372 * is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
374 * "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
377 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
379 reg-shift = <2>;
383 reset-names = "serial";
385 dma-names = "rx", "tx";
390 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
392 reg-shift = <2>;
396 reset-names = "serial";
398 dma-names = "rx", "tx";
403 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
405 reg-shift = <2>;
409 reset-names = "serial";
411 dma-names = "rx", "tx";
416 compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart";
418 reg-shift = <2>;
422 reset-names = "serial";
424 dma-names = "rx", "tx";
429 compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm";
431 #pwm-cells = <2>;
434 reset-names = "pwm";
439 compatible = "nvidia,tegra124-i2c";
442 #address-cells = <1>;
443 #size-cells = <0>;
445 clock-names = "div-clk";
447 reset-names = "i2c";
449 dma-names = "rx", "tx";
454 compatible = "nvidia,tegra124-i2c";
457 #address-cells = <1>;
458 #size-cells = <0>;
460 clock-names = "div-clk";
462 reset-names = "i2c";
464 dma-names = "rx", "tx";
469 compatible = "nvidia,tegra124-i2c";
472 #address-cells = <1>;
473 #size-cells = <0>;
475 clock-names = "div-clk";
477 reset-names = "i2c";
479 dma-names = "rx", "tx";
484 compatible = "nvidia,tegra124-i2c";
487 #address-cells = <1>;
488 #size-cells = <0>;
490 clock-names = "div-clk";
492 reset-names = "i2c";
494 dma-names = "rx", "tx";
499 compatible = "nvidia,tegra124-i2c";
502 #address-cells = <1>;
503 #size-cells = <0>;
505 clock-names = "div-clk";
507 reset-names = "i2c";
509 dma-names = "rx", "tx";
514 compatible = "nvidia,tegra124-i2c";
517 #address-cells = <1>;
518 #size-cells = <0>;
520 clock-names = "div-clk";
522 reset-names = "i2c";
524 dma-names = "rx", "tx";
529 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
532 #address-cells = <1>;
533 #size-cells = <0>;
535 clock-names = "spi";
537 reset-names = "spi";
539 dma-names = "rx", "tx";
544 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
547 #address-cells = <1>;
548 #size-cells = <0>;
550 clock-names = "spi";
552 reset-names = "spi";
554 dma-names = "rx", "tx";
559 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
562 #address-cells = <1>;
563 #size-cells = <0>;
565 clock-names = "spi";
567 reset-names = "spi";
569 dma-names = "rx", "tx";
574 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
577 #address-cells = <1>;
578 #size-cells = <0>;
580 clock-names = "spi";
582 reset-names = "spi";
584 dma-names = "rx", "tx";
589 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
592 #address-cells = <1>;
593 #size-cells = <0>;
595 clock-names = "spi";
597 reset-names = "spi";
599 dma-names = "rx", "tx";
604 compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
607 #address-cells = <1>;
608 #size-cells = <0>;
610 clock-names = "spi";
612 reset-names = "spi";
614 dma-names = "rx", "tx";
619 compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
626 compatible = "nvidia,tegra124-pmc";
629 clock-names = "pclk", "clk32k_in";
630 #clock-cells = <1>;
634 compatible = "nvidia,tegra124-efuse";
637 clock-names = "fuse";
639 reset-names = "fuse";
642 mc: memory-controller@70019000 {
643 compatible = "nvidia,tegra124-mc";
646 clock-names = "mc";
650 #iommu-cells = <1>;
651 #reset-cells = <1>;
652 #interconnect-cells = <1>;
655 emc: external-memory-controller@7001b000 {
656 compatible = "nvidia,tegra124-emc";
659 clock-names = "emc";
661 nvidia,memory-controller = <&mc>;
662 operating-points-v2 = <&emc_icc_dvfs_opp_table>;
664 #interconnect-cells = <0>;
668 compatible = "nvidia,tegra124-ahci";
674 clock-names = "sata", "sata-oob";
678 reset-names = "sata", "sata-cold", "sata-oob";
683 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
689 clock-names = "hda", "hda2hdmi", "hda2codec_2x";
693 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
698 compatible = "nvidia,tegra124-xusb";
702 reg-names = "hcd", "fpci", "ipfs";
718 clock-names = "xusb_host", "xusb_host_src",
725 reset-names = "xusb_host", "xusb_ss", "xusb_src";
727 nvidia,xusb-padctl = <&padctl>;
733 compatible = "nvidia,tegra124-xusb-padctl";
736 reset-names = "padctl";
743 usb2-0 {
745 #phy-cells = <0>;
748 usb2-1 {
750 #phy-cells = <0>;
753 usb2-2 {
755 #phy-cells = <0>;
764 ulpi-0 {
766 #phy-cells = <0>;
775 hsic-0 {
777 #phy-cells = <0>;
780 hsic-1 {
782 #phy-cells = <0>;
791 pcie-0 {
793 #phy-cells = <0>;
796 pcie-1 {
798 #phy-cells = <0>;
801 pcie-2 {
803 #phy-cells = <0>;
806 pcie-3 {
808 #phy-cells = <0>;
811 pcie-4 {
813 #phy-cells = <0>;
822 sata-0 {
824 #phy-cells = <0>;
831 usb2-0 {
835 usb2-1 {
839 usb2-2 {
843 ulpi-0 {
847 hsic-0 {
851 hsic-1 {
855 usb3-0 {
859 usb3-1 {
866 compatible = "nvidia,tegra124-sdhci";
870 clock-names = "sdhci";
872 reset-names = "sdhci";
877 compatible = "nvidia,tegra124-sdhci";
881 clock-names = "sdhci";
883 reset-names = "sdhci";
888 compatible = "nvidia,tegra124-sdhci";
892 clock-names = "sdhci";
894 reset-names = "sdhci";
899 compatible = "nvidia,tegra124-sdhci";
903 clock-names = "sdhci";
905 reset-names = "sdhci";
910 compatible = "nvidia,tegra124-cec";
914 clock-names = "cec";
916 hdmi-phandle = <&hdmi>;
919 soctherm: thermal-sensor@700e2000 {
920 compatible = "nvidia,tegra124-soctherm";
923 reg-names = "soctherm-reg", "car-reg";
926 interrupt-names = "thermal", "edp";
929 clock-names = "tsensor", "soctherm";
931 reset-names = "soctherm";
932 #thermal-sensor-cells = <1>;
934 throttle-cfgs {
937 nvidia,cpu-throt-percent = <85>;
938 nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
940 #cooling-cells = <2>;
946 compatible = "nvidia,tegra124-dfll";
950 <0 0x70110200 0 0x100>; /* Look-up table RAM */
955 clock-names = "soc", "ref", "i2c";
957 reset-names = "dvco";
958 #clock-cells = <0>;
959 clock-output-names = "dfllCPU_out";
960 nvidia,sample-rate = <12500>;
961 nvidia,droop-ctrl = <0x00000f00>;
962 nvidia,force-mode = <1>;
970 compatible = "nvidia,tegra124-ahub";
977 clock-names = "d_audio", "apbif";
999 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
1013 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
1018 #address-cells = <2>;
1019 #size-cells = <2>;
1022 compatible = "nvidia,tegra124-i2s";
1024 nvidia,ahub-cif-ids = <4 4>;
1027 reset-names = "i2s";
1032 compatible = "nvidia,tegra124-i2s";
1034 nvidia,ahub-cif-ids = <5 5>;
1037 reset-names = "i2s";
1042 compatible = "nvidia,tegra124-i2s";
1044 nvidia,ahub-cif-ids = <6 6>;
1047 reset-names = "i2s";
1052 compatible = "nvidia,tegra124-i2s";
1054 nvidia,ahub-cif-ids = <7 7>;
1057 reset-names = "i2s";
1062 compatible = "nvidia,tegra124-i2s";
1064 nvidia,ahub-cif-ids = <8 8>;
1067 reset-names = "i2s";
1073 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1079 reset-names = "usb";
1084 phy1: usb-phy@7d000000 {
1085 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1093 clock-names = "reg", "pll_u", "utmi-pads";
1095 reset-names = "usb", "utmi-pads";
1096 #phy-cells = <0>;
1097 nvidia,hssync-start-delay = <0>;
1098 nvidia,idle-wait-delay = <17>;
1099 nvidia,elastic-limit = <16>;
1100 nvidia,term-range-adj = <6>;
1101 nvidia,xcvr-setup = <9>;
1102 nvidia,xcvr-lsfslew = <0>;
1103 nvidia,xcvr-lsrslew = <3>;
1104 nvidia,hssquelch-level = <2>;
1105 nvidia,hsdiscon-level = <5>;
1106 nvidia,xcvr-hsslew = <12>;
1107 nvidia,has-utmi-pad-registers;
1113 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1119 reset-names = "usb";
1124 phy2: usb-phy@7d004000 {
1125 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1133 clock-names = "reg", "pll_u", "utmi-pads";
1135 reset-names = "usb", "utmi-pads";
1136 #phy-cells = <0>;
1137 nvidia,hssync-start-delay = <0>;
1138 nvidia,idle-wait-delay = <17>;
1139 nvidia,elastic-limit = <16>;
1140 nvidia,term-range-adj = <6>;
1141 nvidia,xcvr-setup = <9>;
1142 nvidia,xcvr-lsfslew = <0>;
1143 nvidia,xcvr-lsrslew = <3>;
1144 nvidia,hssquelch-level = <2>;
1145 nvidia,hsdiscon-level = <5>;
1146 nvidia,xcvr-hsslew = <12>;
1152 compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
1158 reset-names = "usb";
1163 phy3: usb-phy@7d008000 {
1164 compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
1172 clock-names = "reg", "pll_u", "utmi-pads";
1174 reset-names = "usb", "utmi-pads";
1175 #phy-cells = <0>;
1176 nvidia,hssync-start-delay = <0>;
1177 nvidia,idle-wait-delay = <17>;
1178 nvidia,elastic-limit = <16>;
1179 nvidia,term-range-adj = <6>;
1180 nvidia,xcvr-setup = <9>;
1181 nvidia,xcvr-lsfslew = <0>;
1182 nvidia,xcvr-lsrslew = <3>;
1183 nvidia,hssquelch-level = <2>;
1184 nvidia,hsdiscon-level = <5>;
1185 nvidia,xcvr-hsslew = <12>;
1191 #address-cells = <1>;
1192 #size-cells = <0>;
1196 compatible = "arm,cortex-a15";
1204 clock-names = "cpu_g", "cpu_lp", "pll_x", "pll_p", "dfll";
1206 clock-latency = <300000>;
1211 compatible = "arm,cortex-a15";
1217 compatible = "arm,cortex-a15";
1223 compatible = "arm,cortex-a15";
1229 compatible = "arm,cortex-a15-pmu";
1234 interrupt-affinity = <&{/cpus/cpu@0}>,
1240 thermal-zones {
1241 cpu-thermal {
1242 polling-delay-passive = <1000>;
1243 polling-delay = <1000>;
1245 thermal-sensors =
1249 cpu-shutdown-trip {
1254 cpu_throttle_trip: throttle-trip {
1261 cooling-maps {
1264 cooling-device = <&throttle_heavy 1 1>;
1269 mem-thermal {
1270 polling-delay-passive = <1000>;
1271 polling-delay = <1000>;
1273 thermal-sensors =
1277 mem-shutdown-trip {
1282 mem-throttle-trip {
1289 cooling-maps {
1297 gpu-thermal {
1298 polling-delay-passive = <1000>;
1299 polling-delay = <1000>;
1301 thermal-sensors =
1305 gpu-shutdown-trip {
1310 gpu_throttle_trip: throttle-trip {
1317 cooling-maps {
1320 cooling-device = <&throttle_heavy 1 1>;
1325 pllx-thermal {
1326 polling-delay-passive = <1000>;
1327 polling-delay = <1000>;
1329 thermal-sensors =
1333 pllx-shutdown-trip {
1338 pllx-throttle-trip {
1345 cooling-maps {
1355 compatible = "arm,armv7-timer";
1364 interrupt-parent = <&gic>;