Lines Matching +full:sun6i +full:- +full:a31 +full:- +full:rtc
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun6i-rtc.h>
44 #include <dt-bindings/clock/sun8i-de2.h>
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/reset/sun8i-de2.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
58 #address-cells = <1>;
59 #size-cells = <1>;
62 framebuffer-hdmi {
63 compatible = "allwinner,simple-framebuffer",
64 "simple-framebuffer";
65 allwinner,pipeline = "mixer0-lcd0-hdmi";
71 framebuffer-tve {
72 compatible = "allwinner,simple-framebuffer",
73 "simple-framebuffer";
74 allwinner,pipeline = "mixer1-lcd1-tve";
82 #address-cells = <1>;
83 #size-cells = <1>;
87 #clock-cells = <0>;
88 compatible = "fixed-clock";
89 clock-frequency = <24000000>;
90 clock-accuracy = <50000>;
91 clock-output-names = "osc24M";
95 #clock-cells = <0>;
96 compatible = "fixed-clock";
97 clock-frequency = <32768>;
98 clock-accuracy = <50000>;
99 clock-output-names = "ext_osc32k";
103 de: display-engine {
104 compatible = "allwinner,sun8i-h3-display-engine";
110 compatible = "simple-bus";
111 #address-cells = <1>;
112 #size-cells = <1>;
113 dma-ranges;
121 clock-names = "bus",
124 #clock-cells = <1>;
125 #reset-cells = <1>;
129 compatible = "allwinner,sun8i-h3-de2-mixer-0";
133 clock-names = "bus",
138 #address-cells = <1>;
139 #size-cells = <0>;
145 remote-endpoint = <&tcon0_in_mixer0>;
151 dma: dma-controller@1c02000 {
152 compatible = "allwinner,sun8i-h3-dma";
157 #dma-cells = <1>;
160 tcon0: lcd-controller@1c0c000 {
161 compatible = "allwinner,sun8i-h3-tcon-tv",
162 "allwinner,sun8i-a83t-tcon-tv";
166 clock-names = "ahb", "tcon-ch1";
168 reset-names = "lcd";
171 #address-cells = <1>;
172 #size-cells = <0>;
178 remote-endpoint = <&mixer0_out_tcon0>;
183 #address-cells = <1>;
184 #size-cells = <0>;
189 remote-endpoint = <&hdmi_in_tcon0>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&mmc0_pins>;
201 reset-names = "ahb";
204 #address-cells = <1>;
205 #size-cells = <0>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&mmc1_pins>;
214 reset-names = "ahb";
217 #address-cells = <1>;
218 #size-cells = <0>;
225 reset-names = "ahb";
228 #address-cells = <1>;
229 #size-cells = <0>;
235 #address-cells = <1>;
236 #size-cells = <1>;
238 ths_calibration: thermal-sensor-calibration@34 {
244 compatible = "allwinner,sun8i-h3-msgbox",
245 "allwinner,sun6i-a31-msgbox";
250 #mbox-cells = <1>;
254 compatible = "allwinner,sun8i-h3-musb";
259 interrupt-names = "mc";
261 phy-names = "usb";
268 compatible = "allwinner,sun8i-h3-usb-phy";
274 reg-names = "phy_ctrl",
283 clock-names = "usb0_phy",
291 reset-names = "usb0_reset",
296 #phy-cells = <1>;
300 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
309 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
319 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
325 phy-names = "usb";
330 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
337 phy-names = "usb";
342 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
348 phy-names = "usb";
353 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
360 phy-names = "usb";
365 compatible = "allwinner,sun8i-h3-ehci", "generic-ehci";
371 phy-names = "usb";
376 compatible = "allwinner,sun8i-h3-ohci", "generic-ohci";
383 phy-names = "usb";
390 clocks = <&osc24M>, <&rtc CLK_OSC32K>;
391 clock-names = "hosc", "losc";
392 #clock-cells = <1>;
393 #reset-cells = <1>;
399 interrupt-parent = <&r_intc>;
403 <&rtc CLK_OSC32K>;
404 clock-names = "apb", "hosc", "losc";
405 gpio-controller;
406 #gpio-cells = <3>;
407 interrupt-controller;
408 #interrupt-cells = <3>;
410 csi_pins: csi-pins {
417 emac_rgmii_pins: emac-rgmii-pins {
422 drive-strength = <40>;
425 i2c0_pins: i2c0-pins {
430 i2c1_pins: i2c1-pins {
435 i2c2_pins: i2c2-pins {
440 mmc0_pins: mmc0-pins {
444 drive-strength = <30>;
445 bias-pull-up;
448 mmc1_pins: mmc1-pins {
452 drive-strength = <30>;
453 bias-pull-up;
456 mmc2_8bit_pins: mmc2-8bit-pins {
462 drive-strength = <30>;
463 bias-pull-up;
466 spdif_tx_pin: spdif-tx-pin {
471 spi0_pins: spi0-pins {
476 spi1_pins: spi1-pins {
481 uart0_pa_pins: uart0-pa-pins {
486 uart1_pins: uart1-pins {
491 uart1_rts_cts_pins: uart1-rts-cts-pins {
496 uart2_pins: uart2-pins {
501 uart2_rts_cts_pins: uart2-rts-cts-pins {
506 uart3_pins: uart3-pins {
511 uart3_rts_cts_pins: uart3-rts-cts-pins {
518 compatible = "allwinner,sun8i-a23-timer";
526 compatible = "allwinner,sun8i-h3-emac";
530 interrupt-names = "macirq";
532 reset-names = "stmmaceth";
534 clock-names = "stmmaceth";
538 #address-cells = <1>;
539 #size-cells = <0>;
540 compatible = "snps,dwmac-mdio";
543 mdio-mux {
544 compatible = "allwinner,sun8i-h3-mdio-mux";
545 #address-cells = <1>;
546 #size-cells = <0>;
548 mdio-parent-bus = <&mdio>;
551 compatible = "allwinner,sun8i-h3-mdio-internal";
553 #address-cells = <1>;
554 #size-cells = <0>;
556 int_mii_phy: ethernet-phy@1 {
557 compatible = "ethernet-phy-ieee802.3-c22";
566 #address-cells = <1>;
567 #size-cells = <0>;
572 mbus: dram-controller@1c62000 {
576 reg-names = "mbus", "dram";
580 clock-names = "mbus", "dram", "bus";
581 #address-cells = <1>;
582 #size-cells = <1>;
583 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
584 #interconnect-cells = <1>;
588 compatible = "allwinner,sun8i-h3-spi";
592 clock-names = "ahb", "mod";
594 dma-names = "rx", "tx";
595 pinctrl-names = "default";
596 pinctrl-0 = <&spi0_pins>;
599 #address-cells = <1>;
600 #size-cells = <0>;
604 compatible = "allwinner,sun8i-h3-spi";
608 clock-names = "ahb", "mod";
610 dma-names = "rx", "tx";
611 pinctrl-names = "default";
612 pinctrl-0 = <&spi1_pins>;
615 #address-cells = <1>;
616 #size-cells = <0>;
620 compatible = "allwinner,sun6i-a31-wdt";
627 #sound-dai-cells = <0>;
628 compatible = "allwinner,sun8i-h3-spdif";
633 clock-names = "apb", "spdif";
635 dma-names = "tx";
640 compatible = "allwinner,sun8i-h3-pwm";
643 #pwm-cells = <3>;
648 #sound-dai-cells = <0>;
649 compatible = "allwinner,sun8i-h3-i2s";
653 clock-names = "apb", "mod";
656 dma-names = "rx", "tx";
661 #sound-dai-cells = <0>;
662 compatible = "allwinner,sun8i-h3-i2s";
666 clock-names = "apb", "mod";
669 dma-names = "rx", "tx";
674 #sound-dai-cells = <0>;
675 compatible = "allwinner,sun8i-h3-i2s";
679 clock-names = "apb", "mod";
682 dma-names = "tx";
687 #sound-dai-cells = <0>;
688 compatible = "allwinner,sun8i-h3-codec";
692 clock-names = "apb", "codec";
695 dma-names = "rx", "tx";
696 allwinner,codec-analog-controls = <&codec_analog>;
701 compatible = "snps,dw-apb-uart";
704 reg-shift = <2>;
705 reg-io-width = <4>;
709 dma-names = "rx", "tx";
714 compatible = "snps,dw-apb-uart";
717 reg-shift = <2>;
718 reg-io-width = <4>;
722 dma-names = "rx", "tx";
727 compatible = "snps,dw-apb-uart";
730 reg-shift = <2>;
731 reg-io-width = <4>;
735 dma-names = "rx", "tx";
740 compatible = "snps,dw-apb-uart";
743 reg-shift = <2>;
744 reg-io-width = <4>;
748 dma-names = "rx", "tx";
753 compatible = "allwinner,sun6i-a31-i2c";
758 pinctrl-names = "default";
759 pinctrl-0 = <&i2c0_pins>;
761 #address-cells = <1>;
762 #size-cells = <0>;
766 compatible = "allwinner,sun6i-a31-i2c";
771 pinctrl-names = "default";
772 pinctrl-0 = <&i2c1_pins>;
774 #address-cells = <1>;
775 #size-cells = <0>;
779 compatible = "allwinner,sun6i-a31-i2c";
784 pinctrl-names = "default";
785 pinctrl-0 = <&i2c2_pins>;
787 #address-cells = <1>;
788 #size-cells = <0>;
791 gic: interrupt-controller@1c81000 {
792 compatible = "arm,gic-400";
797 interrupt-controller;
798 #interrupt-cells = <3>;
803 compatible = "allwinner,sun8i-h3-csi";
809 clock-names = "bus", "mod", "ram";
811 pinctrl-names = "default";
812 pinctrl-0 = <&csi_pins>;
817 compatible = "allwinner,sun8i-h3-dw-hdmi",
818 "allwinner,sun8i-a83t-dw-hdmi";
820 reg-io-width = <1>;
823 <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
824 clock-names = "iahb", "isfr", "tmds", "cec";
826 reset-names = "ctrl";
828 phy-names = "phy";
832 #address-cells = <1>;
833 #size-cells = <0>;
839 remote-endpoint = <&tcon0_out_hdmi>;
849 hdmi_phy: hdmi-phy@1ef0000 {
850 compatible = "allwinner,sun8i-h3-hdmi-phy";
854 clock-names = "bus", "mod", "pll-0";
856 reset-names = "phy";
857 #phy-cells = <0>;
860 rtc: rtc@1f00000 { label
863 interrupt-parent = <&r_intc>;
866 clock-output-names = "osc32k", "osc32k-out", "iosc";
868 #clock-cells = <1>;
871 r_intc: interrupt-controller@1f00c00 {
872 compatible = "allwinner,sun8i-h3-r-intc",
873 "allwinner,sun6i-a31-r-intc";
874 interrupt-controller;
875 #interrupt-cells = <3>;
881 compatible = "allwinner,sun8i-h3-r-ccu";
883 clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
885 clock-names = "hosc", "losc", "iosc", "pll-periph";
886 #clock-cells = <1>;
887 #reset-cells = <1>;
890 codec_analog: codec-analog@1f015c0 {
891 compatible = "allwinner,sun8i-h3-codec-analog";
896 compatible = "allwinner,sun6i-a31-ir";
898 clock-names = "apb", "ir";
906 compatible = "allwinner,sun6i-a31-i2c";
909 pinctrl-names = "default";
910 pinctrl-0 = <&r_i2c_pins>;
914 #address-cells = <1>;
915 #size-cells = <0>;
919 compatible = "snps,dw-apb-uart";
922 reg-shift = <2>;
923 reg-io-width = <4>;
926 pinctrl-names = "default";
927 pinctrl-0 = <&r_uart_pins>;
932 compatible = "allwinner,sun8i-h3-r-pinctrl";
934 interrupt-parent = <&r_intc>;
937 <&rtc CLK_OSC32K>;
938 clock-names = "apb", "hosc", "losc";
939 gpio-controller;
940 #gpio-cells = <3>;
941 interrupt-controller;
942 #interrupt-cells = <3>;
944 r_ir_rx_pin: r-ir-rx-pin {
949 r_i2c_pins: r-i2c-pins {
954 r_pwm_pin: r-pwm-pin {
959 r_uart_pins: r-uart-pins {
966 compatible = "allwinner,sun8i-h3-pwm";
968 pinctrl-names = "default";
969 pinctrl-0 = <&r_pwm_pin>;
971 #pwm-cells = <3>;