Lines Matching +full:0 +full:x01c68000
87 #clock-cells = <0>;
95 #clock-cells = <0>;
118 reg = <0x01000000 0x10000>;
129 compatible = "allwinner,sun8i-h3-de2-mixer-0";
130 reg = <0x01100000 0x100000>;
139 #size-cells = <0>;
153 reg = <0x01c02000 0x1000>;
163 reg = <0x01c0c000 0x1000>;
172 #size-cells = <0>;
174 tcon0_in: port@0 {
175 reg = <0>;
184 #size-cells = <0>;
197 reg = <0x01c0f000 0x1000>;
199 pinctrl-0 = <&mmc0_pins>;
205 #size-cells = <0>;
210 reg = <0x01c10000 0x1000>;
212 pinctrl-0 = <&mmc1_pins>;
218 #size-cells = <0>;
223 reg = <0x01c11000 0x1000>;
229 #size-cells = <0>;
234 reg = <0x1c14000 0x400>;
239 reg = <0x34 4>;
246 reg = <0x01c17000 0x1000>;
255 reg = <0x01c19000 0x400>;
260 phys = <&usbphy 0>;
262 extcon = <&usbphy 0>;
269 reg = <0x01c19400 0x2c>,
270 <0x01c1a800 0x4>,
271 <0x01c1b800 0x4>,
272 <0x01c1c800 0x4>,
273 <0x01c1d800 0x4>;
301 reg = <0x01c1a000 0x100>;
310 reg = <0x01c1a400 0x100>;
320 reg = <0x01c1b000 0x100>;
331 reg = <0x01c1b400 0x100>;
343 reg = <0x01c1c000 0x100>;
354 reg = <0x01c1c400 0x100>;
366 reg = <0x01c1d000 0x100>;
377 reg = <0x01c1d400 0x100>;
389 reg = <0x01c20000 0x400>;
398 reg = <0x01c20800 0x400>;
519 reg = <0x01c20c00 0xa0>;
528 reg = <0x01c30000 0x10000>;
539 #size-cells = <0>;
546 #size-cells = <0>;
554 #size-cells = <0>;
567 #size-cells = <0>;
574 reg = <0x01c62000 0x1000>,
575 <0x01c63000 0x1000>;
583 dma-ranges = <0x00000000 0x40000000 0xc0000000>;
589 reg = <0x01c68000 0x1000>;
596 pinctrl-0 = <&spi0_pins>;
600 #size-cells = <0>;
605 reg = <0x01c69000 0x1000>;
612 pinctrl-0 = <&spi1_pins>;
616 #size-cells = <0>;
621 reg = <0x01c20ca0 0x20>;
627 #sound-dai-cells = <0>;
629 reg = <0x01c21000 0x400>;
641 reg = <0x01c21400 0x8>;
648 #sound-dai-cells = <0>;
650 reg = <0x01c22000 0x400>;
661 #sound-dai-cells = <0>;
663 reg = <0x01c22400 0x400>;
674 #sound-dai-cells = <0>;
676 reg = <0x01c22800 0x400>;
687 #sound-dai-cells = <0>;
689 reg = <0x01c22c00 0x400>;
702 reg = <0x01c28000 0x400>;
703 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
715 reg = <0x01c28400 0x400>;
728 reg = <0x01c28800 0x400>;
741 reg = <0x01c28c00 0x400>;
754 reg = <0x01c2ac00 0x400>;
759 pinctrl-0 = <&i2c0_pins>;
762 #size-cells = <0>;
767 reg = <0x01c2b000 0x400>;
772 pinctrl-0 = <&i2c1_pins>;
775 #size-cells = <0>;
780 reg = <0x01c2b400 0x400>;
785 pinctrl-0 = <&i2c2_pins>;
788 #size-cells = <0>;
793 reg = <0x01c81000 0x1000>,
794 <0x01c82000 0x2000>,
795 <0x01c84000 0x2000>,
796 <0x01c86000 0x2000>;
804 reg = <0x01cb0000 0x1000>;
812 pinctrl-0 = <&csi_pins>;
819 reg = <0x01ee0000 0x10000>;
833 #size-cells = <0>;
835 hdmi_in: port@0 {
836 reg = <0>;
851 reg = <0x01ef0000 0x10000>;
854 clock-names = "bus", "mod", "pll-0";
857 #phy-cells = <0>;
862 reg = <0x01f00000 0x400>;
876 reg = <0x01f00c00 0x400>;
882 reg = <0x01f01400 0x100>;
892 reg = <0x01f015c0 0x4>;
901 reg = <0x01f02000 0x400>;
907 reg = <0x01f02400 0x400>;
910 pinctrl-0 = <&r_i2c_pins>;
915 #size-cells = <0>;
920 reg = <0x01f02800 0x400>;
927 pinctrl-0 = <&r_uart_pins>;
933 reg = <0x01f02c00 0x400>;
967 reg = <0x01f03800 0x8>;
969 pinctrl-0 = <&r_pwm_pin>;