Lines Matching +full:1 +full:c18000
54 #address-cells = <1>;
55 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <1>;
81 #address-cells = <1>;
93 cpu1: cpu@1 {
96 reg = <1>;
163 thermal-sensors = <&ths 1>;
169 #address-cells = <1>;
170 #size-cells = <1>;
182 #clock-cells = <1>;
183 #reset-cells = <1>;
196 #address-cells = <1>;
199 mixer0_out: port@1 {
200 reg = <1>;
209 compatible = "allwinner,sun8i-r40-de2-mixer-1";
218 #address-cells = <1>;
221 mixer1_out: port@1 {
222 reg = <1>;
249 syscon: system-control@1c00000 {
253 #address-cells = <1>;
254 #size-cells = <1>;
257 sram_c: sram@1d00000 {
260 #address-cells = <1>;
261 #size-cells = <1>;
272 nmi_intc: interrupt-controller@1c00030 {
280 dma: dma-controller@1c02000 {
289 #dma-cells = <1>;
292 spi0: spi@1c05000 {
301 #address-cells = <1>;
305 spi1: spi@1c06000 {
314 #address-cells = <1>;
318 csi0: csi@1c09000 {
332 video-codec@1c0e000 {
340 allwinner,sram = <&ve_sram 1>;
343 mmc0: mmc@1c0f000 {
355 #address-cells = <1>;
359 mmc1: mmc@1c10000 {
369 #address-cells = <1>;
373 mmc2: mmc@1c11000 {
385 #address-cells = <1>;
389 mmc3: mmc@1c12000 {
401 #address-cells = <1>;
405 usbphy: phy@1c13400 {
428 #phy-cells = <1>;
431 crypto: crypto@1c15000 {
440 spi2: spi@1c17000 {
449 #address-cells = <1>;
453 ahci: sata@1c18000 {
463 ehci1: usb@1c19000 {
469 phys = <&usbphy 1>;
474 ohci1: usb@1c19400 {
481 phys = <&usbphy 1>;
486 ehci2: usb@1c1c000 {
497 ohci2: usb@1c1c400 {
509 spi3: spi@1c1f000 {
518 #address-cells = <1>;
522 ccu: clock@1c20000 {
527 #clock-cells = <1>;
528 #reset-cells = <1>;
531 rtc: rtc@1c20400 {
537 #clock-cells = <1>;
540 pio: pinctrl@1c20800 {
742 timer@1c20c00 {
754 wdt: watchdog@1c20c90 {
761 ir0: ir@1c21800 {
774 ir1: ir@1c21c00 {
787 i2s0: i2s@1c22000 {
800 i2s1: i2s@1c22400 {
813 i2s2: i2s@1c22800 {
826 ths: thermal-sensor@1c24c00 {
834 #thermal-sensor-cells = <1>;
837 uart0: serial@1c28000 {
840 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
848 uart1: serial@1c28400 {
859 uart2: serial@1c28800 {
870 uart3: serial@1c28c00 {
881 uart4: serial@1c29000 {
892 uart5: serial@1c29400 {
903 uart6: serial@1c29800 {
914 uart7: serial@1c29c00 {
925 i2c0: i2c@1c2ac00 {
934 #address-cells = <1>;
938 i2c1: i2c@1c2b000 {
947 #address-cells = <1>;
951 i2c2: i2c@1c2b400 {
960 #address-cells = <1>;
964 i2c3: i2c@1c2b800 {
973 #address-cells = <1>;
977 can0: can@1c2bc00 {
986 i2c4: i2c@1c2c000 {
995 #address-cells = <1>;
999 mali: gpu@1c40000 {
1021 gmac: ethernet@1c50000 {
1035 #address-cells = <1>;
1040 mbus: dram-controller@1c62000 {
1044 #address-cells = <1>;
1045 #size-cells = <1>;
1047 #interconnect-cells = <1>;
1050 tcon_top: tcon-top@1c70000 {
1069 #clock-cells = <1>;
1072 #address-cells = <1>;
1083 tcon_top_mixer0_out: port@1 {
1084 #address-cells = <1>;
1086 reg = <1>;
1092 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
1093 reg = <1>;
1108 #address-cells = <1>;
1112 tcon_top_mixer1_in_mixer1: endpoint@1 {
1113 reg = <1>;
1119 #address-cells = <1>;
1127 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
1128 reg = <1>;
1143 #address-cells = <1>;
1152 tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
1153 reg = <1>;
1168 tcon_tv0: lcd-controller@1c73000 {
1179 #address-cells = <1>;
1183 #address-cells = <1>;
1192 tcon_tv0_in_tcon_top_mixer1: endpoint@1 {
1193 reg = <1>;
1198 tcon_tv0_out: port@1 {
1199 #address-cells = <1>;
1201 reg = <1>;
1203 tcon_tv0_out_tcon_top: endpoint@1 {
1204 reg = <1>;
1211 tcon_tv1: lcd-controller@1c74000 {
1222 #address-cells = <1>;
1226 #address-cells = <1>;
1235 tcon_tv1_in_tcon_top_mixer1: endpoint@1 {
1236 reg = <1>;
1241 tcon_tv1_out: port@1 {
1242 #address-cells = <1>;
1244 reg = <1>;
1246 tcon_tv1_out_tcon_top: endpoint@1 {
1247 reg = <1>;
1254 gic: interrupt-controller@1c81000 {
1265 hdmi: hdmi@1ee0000 {
1269 reg-io-width = <1>;
1281 #address-cells = <1>;
1292 hdmi_out: port@1 {
1293 reg = <1>;
1298 hdmi_phy: hdmi-phy@1ef0000 {
1303 clock-names = "bus", "mod", "pll-0", "pll-1";