Lines Matching full:rcc
132 clocks = <&rcc TIM2_K>;
167 clocks = <&rcc TIM3_K>;
203 clocks = <&rcc TIM4_K>;
237 clocks = <&rcc TIM5_K>;
273 clocks = <&rcc TIM6_K>;
293 clocks = <&rcc TIM7_K>;
313 clocks = <&rcc TIM12_K>;
337 clocks = <&rcc TIM13_K>;
361 clocks = <&rcc TIM14_K>;
384 clocks = <&rcc LPTIM1_K>;
413 clocks = <&rcc SPI2_K>;
414 resets = <&rcc SPI2_R>;
438 clocks = <&rcc SPI3_K>;
439 resets = <&rcc SPI3_R>;
461 clocks = <&rcc SPDIF_K>;
474 clocks = <&rcc USART2_K>;
486 clocks = <&rcc USART3_K>;
498 clocks = <&rcc UART4_K>;
510 clocks = <&rcc UART5_K>;
524 clocks = <&rcc I2C1_K>;
525 resets = <&rcc I2C1_R>;
540 clocks = <&rcc I2C2_K>;
541 resets = <&rcc I2C2_R>;
556 clocks = <&rcc I2C3_K>;
557 resets = <&rcc I2C3_R>;
572 clocks = <&rcc I2C5_K>;
573 resets = <&rcc I2C5_R>;
586 clocks = <&rcc CEC_K>, <&rcc CEC>;
594 clocks = <&rcc DAC12>;
619 clocks = <&rcc UART7_K>;
631 clocks = <&rcc UART8_K>;
649 clocks = <&rcc TIM1_K>;
690 clocks = <&rcc TIM8_K>;
725 clocks = <&rcc USART6_K>;
739 clocks = <&rcc SPI1_K>;
740 resets = <&rcc SPI1_R>;
764 clocks = <&rcc SPI4_K>;
765 resets = <&rcc SPI4_R>;
779 clocks = <&rcc TIM15_K>;
808 clocks = <&rcc TIM16_K>;
834 clocks = <&rcc TIM17_K>;
860 clocks = <&rcc SPI5_K>;
861 resets = <&rcc SPI5_R>;
875 resets = <&rcc SAI1_R>;
883 clocks = <&rcc SAI1_K>;
893 clocks = <&rcc SAI1_K>;
907 resets = <&rcc SAI2_R>;
914 clocks = <&rcc SAI2_K>;
924 clocks = <&rcc SAI2_K>;
938 resets = <&rcc SAI3_R>;
945 clocks = <&rcc SAI3_K>;
955 clocks = <&rcc SAI3_K>;
965 clocks = <&rcc DFSDM_K>;
1043 clocks = <&rcc DMA1>;
1044 resets = <&rcc DMA1_R>;
1061 clocks = <&rcc DMA2>;
1062 resets = <&rcc DMA2_R>;
1075 clocks = <&rcc DMAMUX>;
1076 resets = <&rcc DMAMUX_R>;
1084 clocks = <&rcc ADC12>, <&rcc ADC12_K>;
1122 clocks = <&rcc SDMMC3_K>;
1124 resets = <&rcc SDMMC3_R>;
1134 clocks = <&rcc USBO_K>;
1136 resets = <&rcc USBO_R>;
1157 clocks = <&rcc IPCC>;
1166 resets = <&rcc CAMITF_R>;
1167 clocks = <&rcc DCMI>;
1174 rcc: rcc@50000000 { label
1175 compatible = "st,stm32mp1-rcc", "syscon";
1219 clocks = <&rcc SYSCFG>;
1228 clocks = <&rcc LPTIM2_K>;
1257 clocks = <&rcc LPTIM3_K>;
1279 clocks = <&rcc LPTIM4_K>;
1295 clocks = <&rcc LPTIM5_K>;
1312 clocks = <&rcc VREF>;
1323 resets = <&rcc SAI4_R>;
1330 clocks = <&rcc SAI4_K>;
1340 clocks = <&rcc SAI4_K>;
1351 clocks = <&rcc TMPSENS>;
1361 clocks = <&rcc HASH1>;
1362 resets = <&rcc HASH1_R>;
1372 clocks = <&rcc RNG1_K>;
1373 resets = <&rcc RNG1_R>;
1381 clocks = <&rcc MDMA>;
1382 resets = <&rcc MDMA_R>;
1393 clocks = <&rcc FMC_K>;
1394 resets = <&rcc FMC_R>;
1430 clocks = <&rcc QSPI_K>;
1431 resets = <&rcc QSPI_R>;
1443 clocks = <&rcc SDMMC1_K>;
1445 resets = <&rcc SDMMC1_R>;
1458 clocks = <&rcc SDMMC2_K>;
1460 resets = <&rcc SDMMC2_R>;
1470 clocks = <&rcc CRC1>;
1486 clocks = <&rcc ETHMAC>,
1487 <&rcc ETHTX>,
1488 <&rcc ETHRX>,
1489 <&rcc ETHCK_K>,
1490 <&rcc ETHPTP_K>,
1491 <&rcc ETHSTP>;
1510 clocks = <&usbphyc>, <&rcc USBH>;
1511 resets = <&rcc USBH_R>;
1519 clocks = <&usbphyc>, <&rcc USBH>;
1520 resets = <&rcc USBH_R>;
1531 clocks = <&rcc LTDC_PX>;
1533 resets = <&rcc LTDC_R>;
1545 clocks = <&rcc IWDG2>, <&rcc CK_LSI>;
1556 clocks = <&rcc USBPHY_K>;
1557 resets = <&rcc USBPHY_R>;
1577 clocks = <&rcc USART1_K>;
1588 clocks = <&rcc SPI6_K>;
1589 resets = <&rcc SPI6_R>;
1602 clocks = <&rcc I2C4_K>;
1603 resets = <&rcc I2C4_R>;
1615 clocks = <&rcc RTCAPB>, <&rcc RTC>;
1640 clocks = <&rcc I2C6_K>;
1641 resets = <&rcc I2C6_R>;
1674 clocks = <&rcc GPIOA>;
1685 clocks = <&rcc GPIOB>;
1696 clocks = <&rcc GPIOC>;
1707 clocks = <&rcc GPIOD>;
1718 clocks = <&rcc GPIOE>;
1729 clocks = <&rcc GPIOF>;
1740 clocks = <&rcc GPIOG>;
1751 clocks = <&rcc GPIOH>;
1762 clocks = <&rcc GPIOI>;
1773 clocks = <&rcc GPIOJ>;
1784 clocks = <&rcc GPIOK>;
1805 clocks = <&rcc GPIOZ>;
1827 resets = <&rcc MCU_R>;
1828 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1829 st,syscfg-tz = <&rcc 0x000 0x1>;