Lines Matching +full:stm32 +full:- +full:vrefbuf
2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
55 compatible = "fixed-clock";
56 clock-frequency = <0>;
59 clk_lse: clk-lse {
60 #clock-cells = <0>;
61 compatible = "fixed-clock";
62 clock-frequency = <32768>;
66 #clock-cells = <0>;
67 compatible = "fixed-clock";
68 clock-frequency = <0>;
74 compatible = "st,stm32-timer";
81 #address-cells = <1>;
82 #size-cells = <0>;
83 compatible = "st,stm32-lptimer";
86 clock-names = "mux";
90 compatible = "st,stm32-pwm-lp";
91 #pwm-cells = <3>;
96 compatible = "st,stm32-lptimer-trigger";
102 compatible = "st,stm32-lptimer-counter";
108 #address-cells = <1>;
109 #size-cells = <0>;
110 compatible = "st,stm32h7-spi";
120 #address-cells = <1>;
121 #size-cells = <0>;
122 compatible = "st,stm32h7-spi";
131 compatible = "st,stm32h7-uart";
139 compatible = "st,stm32h7-uart";
147 compatible = "st,stm32h7-uart";
155 compatible = "st,stm32f7-i2c";
156 #address-cells = <1>;
157 #size-cells = <0>;
167 compatible = "st,stm32f7-i2c";
168 #address-cells = <1>;
169 #size-cells = <0>;
179 compatible = "st,stm32f7-i2c";
180 #address-cells = <1>;
181 #size-cells = <0>;
191 compatible = "st,stm32h7-dac-core";
194 clock-names = "pclk";
195 #address-cells = <1>;
196 #size-cells = <0>;
200 compatible = "st,stm32-dac";
201 #io-channel-cells = <1>;
207 compatible = "st,stm32-dac";
208 #io-channel-cells = <1>;
215 compatible = "st,stm32h7-uart";
223 #address-cells = <1>;
224 #size-cells = <0>;
225 compatible = "st,stm32h7-spi";
234 #address-cells = <1>;
235 #size-cells = <0>;
236 compatible = "st,stm32h7-spi";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "st,stm32h7-spi";
255 dma1: dma-controller@40020000 {
256 compatible = "st,stm32-dma";
267 #dma-cells = <4>;
269 dma-requests = <8>;
273 dma2: dma-controller@40020400 {
274 compatible = "st,stm32-dma";
285 #dma-cells = <4>;
287 dma-requests = <8>;
291 dmamux1: dma-router@40020800 {
292 compatible = "st,stm32h7-dmamux";
294 #dma-cells = <3>;
295 dma-channels = <16>;
296 dma-requests = <128>;
297 dma-masters = <&dma1 &dma2>;
302 compatible = "st,stm32h7-adc-core";
306 clock-names = "bus";
307 interrupt-controller;
308 #interrupt-cells = <1>;
309 #address-cells = <1>;
310 #size-cells = <0>;
314 compatible = "st,stm32h7-adc";
315 #io-channel-cells = <1>;
317 interrupt-parent = <&adc_12>;
323 compatible = "st,stm32h7-adc";
324 #io-channel-cells = <1>;
326 interrupt-parent = <&adc_12>;
333 compatible = "st,stm32f7-hsotg";
337 clock-names = "otg";
338 g-rx-fifo-size = <256>;
339 g-np-tx-fifo-size = <32>;
340 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
345 compatible = "st,stm32f4x9-fsotg";
349 clock-names = "otg";
353 ltdc: display-controller@50001000 {
354 compatible = "st,stm32-ltdc";
359 clock-names = "lcd";
363 mdma1: dma-controller@52000000 {
364 compatible = "st,stm32h7-mdma";
368 #dma-cells = <5>;
369 dma-channels = <16>;
370 dma-requests = <32>;
375 arm,primecell-periphid = <0x10153180>;
378 interrupt-names = "cmd_irq";
380 clock-names = "apb_pclk";
382 cap-sd-highspeed;
383 cap-mmc-highspeed;
384 max-frequency = <120000000>;
389 arm,primecell-periphid = <0x10153180>;
392 interrupt-names = "cmd_irq";
394 clock-names = "apb_pclk";
396 cap-sd-highspeed;
397 cap-mmc-highspeed;
398 max-frequency = <120000000>;
402 exti: interrupt-controller@58000000 {
403 compatible = "st,stm32h7-exti";
404 interrupt-controller;
405 #interrupt-cells = <2>;
411 compatible = "st,stm32-syscfg", "syscon";
416 #address-cells = <1>;
417 #size-cells = <0>;
418 compatible = "st,stm32h7-spi";
427 compatible = "st,stm32f7-i2c";
428 #address-cells = <1>;
429 #size-cells = <0>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 compatible = "st,stm32-lptimer";
444 clock-names = "mux";
448 compatible = "st,stm32-pwm-lp";
449 #pwm-cells = <3>;
454 compatible = "st,stm32-lptimer-trigger";
460 compatible = "st,stm32-lptimer-counter";
466 #address-cells = <1>;
467 #size-cells = <0>;
468 compatible = "st,stm32-lptimer";
471 clock-names = "mux";
475 compatible = "st,stm32-pwm-lp";
476 #pwm-cells = <3>;
481 compatible = "st,stm32-lptimer-trigger";
488 compatible = "st,stm32-lptimer";
491 clock-names = "mux";
495 compatible = "st,stm32-pwm-lp";
496 #pwm-cells = <3>;
502 compatible = "st,stm32-lptimer";
505 clock-names = "mux";
509 compatible = "st,stm32-pwm-lp";
510 #pwm-cells = <3>;
515 vrefbuf: regulator@58003c00 { label
516 compatible = "st,stm32-vrefbuf";
519 regulator-min-microvolt = <1500000>;
520 regulator-max-microvolt = <2500000>;
525 compatible = "st,stm32h7-rtc";
528 clock-names = "pclk", "rtc_ck";
529 assigned-clocks = <&rcc RTC_CK>;
530 assigned-clock-parents = <&rcc LSE_CK>;
531 interrupt-parent = <&exti>;
537 rcc: reset-clock-controller@58024400 {
538 compatible = "st,stm32h743-rcc", "st,stm32-rcc";
540 #clock-cells = <1>;
541 #reset-cells = <1>;
546 pwrcfg: power-config@58024800 {
547 compatible = "st,stm32-power-config", "syscon";
552 compatible = "st,stm32h7-adc-core";
556 clock-names = "bus";
557 interrupt-controller;
558 #interrupt-cells = <1>;
559 #address-cells = <1>;
560 #size-cells = <0>;
564 compatible = "st,stm32h7-adc";
565 #io-channel-cells = <1>;
567 interrupt-parent = <&adc_3>;
574 compatible = "st,stm32-dwmac", "snps,dwmac-4.10a";
576 reg-names = "stmmaceth";
578 interrupt-names = "macirq";
579 clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
587 #address-cells = <1>;
588 #size-cells = <1>;
589 compatible = "st,stm32h743-pinctrl";
591 interrupt-parent = <&exti>;
593 pins-are-numbered;
596 gpio-controller;
597 #gpio-cells = <2>;
600 st,bank-name = "GPIOA";
601 interrupt-controller;
602 #interrupt-cells = <2>;
604 gpio-ranges = <&pinctrl 0 0 16>;
608 gpio-controller;
609 #gpio-cells = <2>;
612 st,bank-name = "GPIOB";
613 interrupt-controller;
614 #interrupt-cells = <2>;
616 gpio-ranges = <&pinctrl 0 16 16>;
620 gpio-controller;
621 #gpio-cells = <2>;
624 st,bank-name = "GPIOC";
625 interrupt-controller;
626 #interrupt-cells = <2>;
628 gpio-ranges = <&pinctrl 0 32 16>;
632 gpio-controller;
633 #gpio-cells = <2>;
636 st,bank-name = "GPIOD";
637 interrupt-controller;
638 #interrupt-cells = <2>;
640 gpio-ranges = <&pinctrl 0 48 16>;
644 gpio-controller;
645 #gpio-cells = <2>;
648 st,bank-name = "GPIOE";
649 interrupt-controller;
650 #interrupt-cells = <2>;
652 gpio-ranges = <&pinctrl 0 64 16>;
656 gpio-controller;
657 #gpio-cells = <2>;
660 st,bank-name = "GPIOF";
661 interrupt-controller;
662 #interrupt-cells = <2>;
664 gpio-ranges = <&pinctrl 0 80 16>;
668 gpio-controller;
669 #gpio-cells = <2>;
672 st,bank-name = "GPIOG";
673 interrupt-controller;
674 #interrupt-cells = <2>;
676 gpio-ranges = <&pinctrl 0 96 16>;
680 gpio-controller;
681 #gpio-cells = <2>;
684 st,bank-name = "GPIOH";
685 interrupt-controller;
686 #interrupt-cells = <2>;
688 gpio-ranges = <&pinctrl 0 112 16>;
692 gpio-controller;
693 #gpio-cells = <2>;
696 st,bank-name = "GPIOI";
697 interrupt-controller;
698 #interrupt-cells = <2>;
700 gpio-ranges = <&pinctrl 0 128 16>;
704 gpio-controller;
705 #gpio-cells = <2>;
708 st,bank-name = "GPIOJ";
709 interrupt-controller;
710 #interrupt-cells = <2>;
712 gpio-ranges = <&pinctrl 0 144 16>;
716 gpio-controller;
717 #gpio-cells = <2>;
720 st,bank-name = "GPIOK";
721 interrupt-controller;
722 #interrupt-cells = <2>;
724 gpio-ranges = <&pinctrl 0 160 8>;
731 clock-frequency = <250000000>;