Lines Matching full:rst
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
78 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
443 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
463 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
483 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
494 resets = <&rst GPIO0_RESET>;
514 resets = <&rst GPIO1_RESET>;
534 resets = <&rst GPIO2_RESET>;
554 resets = <&rst FPGAMGR_RESET>;
565 resets = <&rst I2C0_RESET>;
576 resets = <&rst I2C1_RESET>;
587 resets = <&rst I2C2_RESET>;
598 resets = <&rst I2C3_RESET>;
609 resets = <&rst I2C4_RESET>;
622 resets = <&rst SPIM0_RESET>;
638 resets = <&rst SPIM1_RESET>;
668 resets = <&rst SDMMC_RESET>;
682 resets = <&rst NAND_RESET>;
777 resets = <&rst QSPI_RESET>, <&rst QSPI_OCP_RESET>;
782 rst: rstmgr@ffd05000 { label
784 compatible = "altr,rst-mgr";
814 resets = <&rst SPTIMER0_RESET>;
824 resets = <&rst SPTIMER1_RESET>;
834 resets = <&rst L4SYSTIMER0_RESET>;
844 resets = <&rst L4SYSTIMER1_RESET>;
855 resets = <&rst UART0_RESET>;
866 resets = <&rst UART1_RESET>;
882 resets = <&rst USB0_RESET>;
895 resets = <&rst USB1_RESET>;
907 resets = <&rst L4WD0_RESET>;
916 resets = <&rst L4WD1_RESET>;