Lines Matching +full:assigned +full:- +full:clock +full:- +full:rates
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/dma/at91.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/mfd/at91-usart.h>
22 #address-cells = <1>;
23 #size-cells = <1>;
24 interrupt-parent = <&gic>;
27 #address-cells = <1>;
28 #size-cells = <0>;
32 compatible = "arm,cortex-a7";
35 clock-names = "cpu";
36 operating-points-v2 = <&cpu_opp_table>;
40 cpu_opp_table: opp-table {
41 compatible = "operating-points-v2";
43 opp-90000000 {
44 opp-hz = /bits/ 64 <90000000>;
45 opp-microvolt = <1050000 1050000 1225000>;
46 clock-latency-ns = <320000>;
49 opp-250000000 {
50 opp-hz = /bits/ 64 <250000000>;
51 opp-microvolt = <1050000 1050000 1225000>;
52 clock-latency-ns = <320000>;
55 opp-600000000 {
56 opp-hz = /bits/ 64 <600000000>;
57 opp-microvolt = <1050000 1050000 1225000>;
58 clock-latency-ns = <320000>;
59 opp-suspend;
62 opp-800000000 {
63 opp-hz = /bits/ 64 <800000000>;
64 opp-microvolt = <1150000 1125000 1225000>;
65 clock-latency-ns = <320000>;
68 opp-1000000002 {
69 opp-hz = /bits/ 64 <1000000002>;
70 opp-microvolt = <1250000 1225000 1300000>;
71 clock-latency-ns = <320000>;
77 compatible = "fixed-clock";
78 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 #clock-cells = <0>;
87 compatible = "fixed-clock";
88 #clock-cells = <0>;
89 clock-frequency = <48000000>;
93 vddout25: fixed-regulator-vddout25 {
94 compatible = "regulator-fixed";
96 regulator-name = "VDDOUT25";
97 regulator-min-microvolt = <2500000>;
98 regulator-max-microvolt = <2500000>;
99 regulator-boot-on;
104 compatible = "mmio-sram";
105 #address-cells = <1>;
106 #size-cells = <1>;
112 compatible = "simple-bus";
113 #address-cells = <1>;
114 #size-cells = <1>;
118 compatible = "mmio-sram";
119 no-memory-wc;
121 #address-cells = <1>;
122 #size-cells = <1>;
126 nfc_io: nfc-io@10000000 {
127 compatible = "atmel,sama5d3-nfc-io", "syscon";
132 compatible = "atmel,sama5d3-ebi";
133 #address-cells = <2>;
134 #size-cells = <1>;
144 nand_controller: nand-controller {
145 compatible = "atmel,sama5d3-nand-controller";
146 atmel,nfc-sram = <&nfc_sram>;
147 atmel,nfc-io = <&nfc_io>;
148 ecc-engine = <&pmecc>;
149 #address-cells = <2>;
150 #size-cells = <1>;
157 compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
160 #address-cells = <1>;
161 #size-cells = <1>;
163 no-memory-wc;
167 compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
169 gpio-controller;
170 #gpio-cells = <2>;
174 compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon";
179 compatible = "microchip,sama7g5-pinctrl";
186 interrupt-controller;
187 #interrupt-cells = <2>;
188 gpio-controller;
189 #gpio-cells = <2>;
194 compatible = "microchip,sama7g5-pmc", "syscon";
197 #clock-cells = <2>;
199 clock-names = "td_slck", "md_slck", "main_xtal";
202 reset_controller: reset-controller@e001d000 {
203 compatible = "microchip,sama7g5-rstc";
205 #reset-cells = <1>;
210 compatible = "microchip,sama7g5-shdwc", "syscon";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 atmel,wakeup-rtc-timer;
216 atmel,wakeup-rtt-timer;
221 compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
227 clk32k: clock-controller@e001d050 {
228 compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc";
231 #clock-cells = <1>;
235 compatible = "microchip,sama7g5-gpbr", "syscon";
240 compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc";
247 compatible = "microchip,sama7g5-wdt";
254 compatible = "microchip,sama7g5-chipid";
259 compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
260 #address-cells = <1>;
261 #size-cells = <0>;
265 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
269 compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
273 #address-cells = <1>;
274 #size-cells = <1>;
277 pmecc: ecc-engine@e0808070 {
278 compatible = "atmel,sama5d2-pmecc";
285 compatible = "microchip,sama7g5-ospi";
287 reg-names = "qspi_base", "qspi_mmap";
291 dma-names = "tx", "rx";
293 clock-names = "pclk", "gclk";
294 #address-cells = <1>;
295 #size-cells = <0>;
300 compatible = "microchip,sama7g5-qspi";
302 reg-names = "qspi_base", "qspi_mmap";
306 dma-names = "tx", "rx";
308 clock-names = "pclk", "gclk";
309 #address-cells = <1>;
310 #size-cells = <0>;
317 reg-names = "m_can", "message_ram";
320 interrupt-names = "int0", "int1";
322 clock-names = "hclk", "cclk";
323 assigned-clocks = <&pmc PMC_TYPE_GCK 61>;
324 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
325 assigned-clock-rates = <40000000>;
326 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
333 reg-names = "m_can", "message_ram";
336 interrupt-names = "int0", "int1";
338 clock-names = "hclk", "cclk";
339 assigned-clocks = <&pmc PMC_TYPE_GCK 62>;
340 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
341 assigned-clock-rates = <40000000>;
342 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
349 reg-names = "m_can", "message_ram";
352 interrupt-names = "int0", "int1";
354 clock-names = "hclk", "cclk";
355 assigned-clocks = <&pmc PMC_TYPE_GCK 63>;
356 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
357 assigned-clock-rates = <40000000>;
358 bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
365 reg-names = "m_can", "message_ram";
368 interrupt-names = "int0", "int1";
370 clock-names = "hclk", "cclk";
371 assigned-clocks = <&pmc PMC_TYPE_GCK 64>;
372 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
373 assigned-clock-rates = <40000000>;
374 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
381 reg-names = "m_can", "message_ram";
384 interrupt-names = "int0", "int1";
386 clock-names = "hclk", "cclk";
387 assigned-clocks = <&pmc PMC_TYPE_GCK 65>;
388 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
389 assigned-clock-rates = <40000000>;
390 bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
397 reg-names = "m_can", "message_ram";
400 interrupt-names = "int0", "int1";
402 clock-names = "hclk", "cclk";
403 assigned-clocks = <&pmc PMC_TYPE_GCK 66>;
404 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
405 assigned-clock-rates = <40000000>;
406 bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
411 compatible = "microchip,sama7g5-adc";
415 assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
416 assigned-clock-rates = <100000000>;
417 clock-names = "adc_clk";
419 dma-names = "rx";
420 atmel,min-sample-rate-hz = <200000>;
421 atmel,max-sample-rate-hz = <20000000>;
422 atmel,startup-time-ms = <4>;
427 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
431 clock-names = "hclock", "multclk";
432 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
433 assigned-clocks = <&pmc PMC_TYPE_GCK 80>;
434 assigned-clock-rates = <200000000>;
435 microchip,sdcal-inverted;
440 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
444 clock-names = "hclock", "multclk";
445 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
446 assigned-clocks = <&pmc PMC_TYPE_GCK 81>;
447 assigned-clock-rates = <200000000>;
448 microchip,sdcal-inverted;
453 compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
457 clock-names = "hclock", "multclk";
458 assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_SYSPLL>;
459 assigned-clocks = <&pmc PMC_TYPE_GCK 82>;
460 assigned-clock-rates = <200000000>;
461 microchip,sdcal-inverted;
466 compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
469 #pwm-cells = <3>;
475 compatible = "microchip,sama7g5-pdmc";
478 #sound-dai-cells = <0>;
480 dma-names = "rx";
482 clock-names = "pclk", "gclk";
487 compatible = "microchip,sama7g5-pdmc";
490 #sound-dai-cells = <0>;
492 dma-names = "rx";
494 clock-names = "pclk", "gclk";
499 #sound-dai-cells = <0>;
500 compatible = "microchip,sama7g5-spdifrx";
504 dma-names = "rx";
506 clock-names = "pclk", "gclk";
511 #sound-dai-cells = <0>;
512 compatible = "microchip,sama7g5-spdiftx";
516 dma-names = "tx";
518 clock-names = "pclk", "gclk";
522 compatible = "microchip,sama7g5-i2smcc";
523 #sound-dai-cells = <0>;
527 dma-names = "tx", "rx";
529 clock-names = "pclk", "gclk";
534 compatible = "microchip,sama7g5-i2smcc";
535 #sound-dai-cells = <0>;
539 dma-names = "tx", "rx";
541 clock-names = "pclk", "gclk";
545 eic: interrupt-controller@e1628000 {
546 compatible = "microchip,sama7g5-eic";
548 interrupt-parent = <&gic>;
549 interrupt-controller;
550 #interrupt-cells = <2>;
554 clock-names = "pclk";
559 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
563 clock-names = "pclk", "gclk";
567 compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b";
571 clock-names = "pclk", "gclk";
575 compatible = "atmel,at91sam9g46-aes";
579 clock-names = "aes_clk";
582 dma-names = "tx", "rx";
586 compatible = "atmel,at91sam9g46-sha";
590 clock-names = "sha_clk";
592 dma-names = "tx";
596 compatible = "atmel,sama5d2-flexcom";
599 #address-cells = <1>;
600 #size-cells = <1>;
605 compatible = "atmel,at91sam9260-usart";
607 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
610 clock-names = "usart";
613 dma-names = "tx", "rx";
614 atmel,use-dma-rx;
615 atmel,use-dma-tx;
621 compatible = "atmel,sama5d2-flexcom";
624 #address-cells = <1>;
625 #size-cells = <1>;
630 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
633 #address-cells = <1>;
634 #size-cells = <0>;
636 atmel,fifo-size = <32>;
639 dma-names = "tx", "rx";
645 compatible = "atmel,sama5d2-flexcom";
648 #address-cells = <1>;
649 #size-cells = <1>;
654 compatible = "atmel,at91sam9260-usart";
656 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
659 clock-names = "usart";
662 dma-names = "tx", "rx";
663 atmel,use-dma-rx;
664 atmel,use-dma-tx;
670 compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng";
678 compatible = "atmel,at91sam9g46-tdes";
682 clock-names = "tdes_clk";
685 dma-names = "tx", "rx";
689 compatible = "atmel,sama5d2-flexcom";
692 #address-cells = <1>;
693 #size-cells = <1>;
698 compatible = "atmel,at91sam9260-usart";
700 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
703 clock-names = "usart";
706 dma-names = "tx", "rx";
707 atmel,use-dma-rx;
708 atmel,use-dma-tx;
709 atmel,fifo-size = <16>;
715 compatible = "atmel,sama5d2-flexcom";
718 #address-cells = <1>;
719 #size-cells = <1>;
724 compatible = "atmel,at91sam9260-usart";
726 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
729 clock-names = "usart";
732 dma-names = "tx", "rx";
733 atmel,use-dma-rx;
734 atmel,use-dma-tx;
735 atmel,fifo-size = <16>;
741 compatible = "microchip,sama7g5-gem";
750 clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
751 assigned-clocks = <&pmc PMC_TYPE_GCK 51>;
752 assigned-clock-rates = <125000000>;
757 compatible = "microchip,sama7g5-emac";
762 clock-names = "pclk", "hclk";
766 dma0: dma-controller@e2808000 {
767 compatible = "microchip,sama7g5-dma";
770 #dma-cells = <1>;
772 clock-names = "dma_clk";
776 dma1: dma-controller@e280c000 {
777 compatible = "microchip,sama7g5-dma";
780 #dma-cells = <1>;
782 clock-names = "dma_clk";
787 dma2: dma-controller@e1200000 {
788 compatible = "microchip,sama7g5-dma";
791 #dma-cells = <1>;
793 clock-names = "dma_clk";
794 dma-requests = <0>;
799 compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
800 #address-cells = <1>;
801 #size-cells = <0>;
805 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
809 compatible = "atmel,sama5d2-flexcom";
812 #address-cells = <1>;
813 #size-cells = <1>;
818 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
821 #address-cells = <1>;
822 #size-cells = <0>;
824 atmel,fifo-size = <32>;
827 dma-names = "tx", "rx";
833 compatible = "atmel,sama5d2-flexcom";
836 #address-cells = <1>;
837 #size-cells = <1>;
842 compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c";
845 #address-cells = <1>;
846 #size-cells = <0>;
848 atmel,fifo-size = <32>;
851 dma-names = "tx", "rx";
857 compatible = "atmel,sama5d2-flexcom";
860 #address-cells = <1>;
861 #size-cells = <1>;
866 compatible = "atmel,at91rm9200-spi";
870 clock-names = "spi_clk";
871 #address-cells = <1>;
872 #size-cells = <0>;
873 atmel,fifo-size = <32>;
876 dma-names = "tx", "rx";
882 compatible = "microchip,sama7g5-uddrc";
887 compatible = "microchip,sama7g5-ddr3phy";
891 gic: interrupt-controller@e8c11000 {
892 compatible = "arm,cortex-a7-gic";
893 #interrupt-cells = <3>;
894 #address-cells = <0>;
895 interrupt-controller;