Lines Matching +full:0 +full:xe0004000
28 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
78 #clock-cells = <0>;
83 #clock-cells = <0>;
88 #clock-cells = <0>;
107 reg = <0x100000 0x20000>;
120 reg = <0x00600000 0x2400>;
123 ranges = <0 0x00600000 0x2400>;
128 reg = <0x10000000 0x8000000>;
136 reg = <0x40000000 0x20000000>;
137 ranges = <0x0 0x0 0x40000000 0x8000000
138 0x1 0x0 0x48000000 0x8000000
139 0x2 0x0 0x50000000 0x8000000
140 0x3 0x0 0x58000000 0x8000000>;
158 reg = <0xe0000000 0x4000>;
162 ranges = <0 0xe0000000 0x4000>;
168 reg = <0xe0004000 0x4000>;
175 reg = <0xe0008000 0x20>;
180 reg = <0xe0014000 0x800>;
195 reg = <0xe0018000 0x200>;
198 clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>;
204 reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>;
206 clocks = <&clk32k 0>;
211 reg = <0xe001d010 0x10>;
212 clocks = <&clk32k 0>;
214 #size-cells = <0>;
222 reg = <0xe001d020 0x30>;
224 clocks = <&clk32k 0>;
229 reg = <0xe001d050 0x4>;
236 reg = <0xe001d060 0x48>;
241 reg = <0xe001d0a8 0x30>;
248 reg = <0xe001d180 0x24>;
250 clocks = <&clk32k 0>;
255 reg = <0xe0020000 0x8>;
261 #size-cells = <0>;
262 reg = <0xe0800000 0x100>;
270 reg = <0xe0808000 0x1000>;
279 reg = <0xe0808070 0x490>,
280 <0xe0808500 0x200>;
286 reg = <0xe080c000 0x400>, <0x20000000 0x10000000>;
295 #size-cells = <0>;
301 reg = <0xe0810000 0x400>, <0x30000000 0x10000000>;
310 #size-cells = <0>;
316 reg = <0xe0828000 0x100>, <0x100000 0x7800>;
326 bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>;
332 reg = <0xe082c000 0x100>, <0x100000 0xbc00>;
342 bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>;
348 reg = <0xe0830000 0x100>, <0x100000 0x10000>;
358 bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>;
364 reg = <0xe0834000 0x100>, <0x110000 0x4400>;
374 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
380 reg = <0xe0838000 0x100>, <0x110000 0x8800>;
390 bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>;
396 reg = <0xe083c000 0x100>, <0x110000 0xcc00>;
406 bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>;
412 reg = <0xe1000000 0x200>;
418 dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
428 reg = <0xe1204000 0x4000>;
441 reg = <0xe1208000 0x4000>;
454 reg = <0xe120c000 0x4000>;
467 reg = <0xe1604000 0x4000>;
476 reg = <0xe1608000 0x1000>;
478 #sound-dai-cells = <0>;
488 reg = <0xe160c000 0x1000>;
490 #sound-dai-cells = <0>;
499 #sound-dai-cells = <0>;
501 reg = <0xe1614000 0x4000>;
511 #sound-dai-cells = <0>;
513 reg = <0xe1618000 0x4000>;
523 #sound-dai-cells = <0>;
524 reg = <0xe161c000 0x4000>;
535 #sound-dai-cells = <0>;
536 reg = <0xe1620000 0x4000>;
547 reg = <0xe1628000 0xec>;
560 reg = <0xe1800000 0x4000>;
568 reg = <0xe1804000 0x4000>;
576 reg = <0xe1810000 0x100>;
587 reg = <0xe1814000 0x100>;
597 reg = <0xe1818000 0x200>;
601 ranges = <0x0 0xe1818000 0x800>;
606 reg = <0x200 0x200>;
622 reg = <0xe181c000 0x200>;
626 ranges = <0x0 0xe181c000 0x800>;
631 reg = <0x600 0x200>;
634 #size-cells = <0>;
646 reg = <0xe1824000 0x200>;
650 ranges = <0x0 0xe1824000 0x800>;
655 reg = <0x200 0x200>;
671 reg = <0xe2010000 0x100>;
679 reg = <0xe2014000 0x100>;
690 reg = <0xe2018000 0x200>;
694 ranges = <0x0 0xe2018000 0x800>;
699 reg = <0x200 0x200>;
716 reg = <0xe2024000 0x200>;
720 ranges = <0x0 0xe2024000 0x800>;
725 reg = <0x200 0x200>;
742 reg = <0xe2800000 0x1000>;
758 reg = <0xe2804000 0x1000>;
768 reg = <0xe2808000 0x1000>;
778 reg = <0xe280c000 0x1000>;
789 reg = <0xe1200000 0x1000>;
794 dma-requests = <0>;
801 #size-cells = <0>;
802 reg = <0xe2814000 0x100>;
810 reg = <0xe2818000 0x200>;
814 ranges = <0x0 0xe2818000 0x800>;
819 reg = <0x600 0x200>;
822 #size-cells = <0>;
834 reg = <0xe281c000 0x200>;
838 ranges = <0x0 0xe281c000 0x800>;
843 reg = <0x600 0x200>;
846 #size-cells = <0>;
858 reg = <0xe2824000 0x200>;
862 ranges = <0x0 0xe2824000 0x800>;
867 reg = <0x400 0x200>;
872 #size-cells = <0>;
883 reg = <0xe3800000 0x4000>;
888 reg = <0xe3804000 0x1000>;
894 #address-cells = <0>;
896 reg = <0xe8c11000 0x1000>,
897 <0xe8c12000 0x2000>;