Lines Matching +full:reg +full:- +full:io +full:- +full:width

1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
25 compatible = "arm,cortex-a7";
26 reg = <0x0>;
27 clock-frequency = <1000000000>;
32 compatible = "arm,cortex-a7";
33 reg = <0x1>;
34 clock-frequency = <1000000000>;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
44 reg = <0x0000b000 0x1000>;
48 reg = <0x01b00000 0x400000>;
52 reg = <0x01ffe000 0x4000>;
56 reg = <0x10000000 0x100000>;
57 no-map;
61 arm-pmu {
62 compatible = "arm,cortex-a7-pmu";
65 interrupt-affinity = <&cpu0>, <&cpu1>;
69 compatible = "arm,armv7-timer";
78 clock-frequency = <27000000>;
82 compatible = "fixed-clock";
83 clock-frequency = <27000000>;
84 #clock-cells = <0>;
85 clock-output-names = "osc27M";
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
98 compatible = "simple-bus";
99 reg = <0x18000000 0x70000>;
100 #address-cells = <1>;
101 #size-cells = <1>;
105 compatible = "syscon", "simple-mfd";
106 reg = <0x0 0x1000>;
107 reg-io-width = <4>;
108 #address-cells = <1>;
109 #size-cells = <1>;
114 compatible = "syscon", "simple-mfd";
115 reg = <0x7000 0x1000>;
116 reg-io-width = <4>;
117 #address-cells = <1>;
118 #size-cells = <1>;
123 compatible = "syscon", "simple-mfd";
124 reg = <0x1a000 0x1000>;
125 reg-io-width = <4>;
126 #address-cells = <1>;
127 #size-cells = <1>;
132 compatible = "syscon", "simple-mfd";
133 reg = <0x1b000 0x1000>;
134 reg-io-width = <4>;
135 #address-cells = <1>;
136 #size-cells = <1>;
141 compatible = "syscon", "simple-mfd";
142 reg = <0x1d000 0x1000>;
143 reg-io-width = <4>;
144 #address-cells = <1>;
145 #size-cells = <1>;
150 gic: interrupt-controller@ff011000 {
151 compatible = "arm,cortex-a7-gic";
152 reg = <0xff011000 0x1000>,
157 interrupt-controller;
158 #interrupt-cells = <3>;
164 reset1: reset-controller@0 {
165 compatible = "snps,dw-low-reset";
166 reg = <0x0 0x4>;
167 #reset-cells = <1>;
170 reset2: reset-controller@4 {
171 compatible = "snps,dw-low-reset";
172 reg = <0x4 0x4>;
173 #reset-cells = <1>;
176 reset3: reset-controller@8 {
177 compatible = "snps,dw-low-reset";
178 reg = <0x8 0x4>;
179 #reset-cells = <1>;
184 iso_reset: reset-controller@88 {
185 compatible = "snps,dw-low-reset";
186 reg = <0x88 0x4>;
187 #reset-cells = <1>;
191 compatible = "realtek,rtd1295-watchdog";
192 reg = <0x680 0x100>;
197 compatible = "snps,dw-apb-uart";
198 reg = <0x800 0x400>;
199 reg-shift = <2>;
200 reg-io-width = <4>;
202 clock-frequency = <27000000>;
209 compatible = "snps,dw-apb-uart";
210 reg = <0x200 0x100>;
211 reg-shift = <2>;
212 reg-io-width = <4>;
214 clock-frequency = <27000000>;