Lines Matching +full:0 +full:xff890000
53 #size-cells = <0>;
60 reg = <0x500>;
71 reg = <0x501>;
82 reg = <0x502>;
93 reg = <0x503>;
103 cpu_opp_table: opp-table-0 {
163 * The rk3288 cannot use the memory area above 0xfe000000
173 reg = <0x0 0xfe000000 0x0 0x1000000>;
181 #clock-cells = <0>;
197 reg = <0x0 0xff810000 0x0 0x20>;
214 fifo-depth = <0x100>;
216 reg = <0x0 0xff0c0000 0x0 0x4000>;
228 fifo-depth = <0x100>;
230 reg = <0x0 0xff0d0000 0x0 0x4000>;
242 fifo-depth = <0x100>;
244 reg = <0x0 0xff0e0000 0x0 0x4000>;
256 fifo-depth = <0x100>;
258 reg = <0x0 0xff0f0000 0x0 0x4000>;
266 reg = <0x0 0xff100000 0x0 0x100>;
284 pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
285 reg = <0x0 0xff110000 0x0 0x1000>;
287 #size-cells = <0>;
299 pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
300 reg = <0x0 0xff120000 0x0 0x1000>;
302 #size-cells = <0>;
314 pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
315 reg = <0x0 0xff130000 0x0 0x1000>;
317 #size-cells = <0>;
323 reg = <0x0 0xff140000 0x0 0x1000>;
326 #size-cells = <0>;
330 pinctrl-0 = <&i2c1_xfer>;
336 reg = <0x0 0xff150000 0x0 0x1000>;
339 #size-cells = <0>;
343 pinctrl-0 = <&i2c3_xfer>;
349 reg = <0x0 0xff160000 0x0 0x1000>;
352 #size-cells = <0>;
356 pinctrl-0 = <&i2c4_xfer>;
362 reg = <0x0 0xff170000 0x0 0x1000>;
365 #size-cells = <0>;
369 pinctrl-0 = <&i2c5_xfer>;
375 reg = <0x0 0xff180000 0x0 0x100>;
384 pinctrl-0 = <&uart0_xfer>;
390 reg = <0x0 0xff190000 0x0 0x100>;
399 pinctrl-0 = <&uart1_xfer>;
405 reg = <0x0 0xff690000 0x0 0x100>;
412 pinctrl-0 = <&uart2_xfer>;
418 reg = <0x0 0xff1b0000 0x0 0x100>;
427 pinctrl-0 = <&uart3_xfer>;
433 reg = <0x0 0xff1c0000 0x0 0x100>;
442 pinctrl-0 = <&uart4_xfer>;
448 reg = <0x0 0xff250000 0x0 0x4000>;
463 thermal-sensors = <&tsadc 0>;
541 reg = <0x0 0xff280000 0x0 0x100>;
548 pinctrl-0 = <&otp_pin>;
559 reg = <0x0 0xff290000 0x0 0x10000>;
579 reg = <0x0 0xff500000 0x0 0x100>;
590 reg = <0x0 0xff520000 0x0 0x100>;
601 reg = <0x0 0xff540000 0x0 0x40000>;
615 reg = <0x0 0xff580000 0x0 0x40000>;
630 reg = <0x0 0xff5c0000 0x0 0x100>;
638 reg = <0x0 0xff600000 0x0 0x4000>;
639 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
651 reg = <0x0 0xff650000 0x0 0x1000>;
654 #size-cells = <0>;
658 pinctrl-0 = <&i2c0_xfer>;
664 reg = <0x0 0xff660000 0x0 0x1000>;
667 #size-cells = <0>;
671 pinctrl-0 = <&i2c2_xfer>;
677 reg = <0x0 0xff680000 0x0 0x10>;
680 pinctrl-0 = <&pwm0_pin>;
687 reg = <0x0 0xff680010 0x0 0x10>;
690 pinctrl-0 = <&pwm1_pin>;
697 reg = <0x0 0xff680020 0x0 0x10>;
700 pinctrl-0 = <&pwm2_pin>;
707 reg = <0x0 0xff680030 0x0 0x10>;
710 pinctrl-0 = <&pwm3_pin>;
717 reg = <0x0 0xff700000 0x0 0x18000>;
720 ranges = <0 0x0 0xff700000 0x18000>;
721 smp-sram@0 {
723 reg = <0x00 0x10>;
729 reg = <0x0 0xff720000 0x0 0x1000>;
734 reg = <0x0 0xff730000 0x0 0x100>;
740 #size-cells = <0>;
804 #power-domain-cells = <0>;
818 #power-domain-cells = <0>;
831 #power-domain-cells = <0>;
843 #power-domain-cells = <0>;
849 offset = <0x94>;
859 reg = <0x0 0xff740000 0x0 0x1000>;
864 reg = <0x0 0xff760000 0x0 0x1000>;
884 reg = <0x0 0xff770000 0x0 0x1000>;
890 #phy-cells = <0>;
902 #size-cells = <0>;
906 #phy-cells = <0>;
907 reg = <0x320>;
910 #clock-cells = <0>;
916 #phy-cells = <0>;
917 reg = <0x334>;
920 #clock-cells = <0>;
926 #phy-cells = <0>;
927 reg = <0x348>;
930 #clock-cells = <0>;
939 reg = <0x0 0xff800000 0x0 0x100>;
947 reg = <0x0 0xff8b0000 0x0 0x10000>;
948 #sound-dai-cells = <0>;
955 pinctrl-0 = <&spdif_tx>;
962 reg = <0x0 0xff890000 0x0 0x10000>;
963 #sound-dai-cells = <0>;
967 dmas = <&dmac_bus_s 0>, <&dmac_bus_s 1>;
970 pinctrl-0 = <&i2s0_bus>;
978 reg = <0x0 0xff8a0000 0x0 0x4000>;
989 reg = <0x0 0xff900800 0x0 0x40>;
993 #iommu-cells = <0>;
999 reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
1003 #iommu-cells = <0>;
1010 reg = <0x0 0xff920000 0x0 0x180>;
1021 reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
1033 #size-cells = <0>;
1035 vopb_out_hdmi: endpoint@0 {
1036 reg = <0>;
1059 reg = <0x0 0xff930300 0x0 0x100>;
1064 #iommu-cells = <0>;
1070 reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
1082 #size-cells = <0>;
1084 vopl_out_hdmi: endpoint@0 {
1085 reg = <0>;
1108 reg = <0x0 0xff940300 0x0 0x100>;
1113 #iommu-cells = <0>;
1119 reg = <0x0 0xff960000 0x0 0x4000>;
1130 #size-cells = <0>;
1131 mipi_in_vopb: endpoint@0 {
1132 reg = <0>;
1145 reg = <0x0 0xff96c000 0x0 0x4000>;
1149 pinctrl-0 = <&lcdc_ctl>;
1156 #size-cells = <0>;
1158 lvds_in: port@0 {
1159 reg = <0>;
1162 #size-cells = <0>;
1164 lvds_in_vopb: endpoint@0 {
1165 reg = <0>;
1178 reg = <0x0 0xff970000 0x0 0x4000>;
1191 #size-cells = <0>;
1192 edp_in: port@0 {
1193 reg = <0>;
1195 #size-cells = <0>;
1196 edp_in_vopb: endpoint@0 {
1197 reg = <0>;
1210 reg = <0x0 0xff980000 0x0 0x20000>;
1212 #sound-dai-cells = <0>;
1223 #size-cells = <0>;
1224 hdmi_in_vopb: endpoint@0 {
1225 reg = <0>;
1238 reg = <0x0 0xff9a0000 0x0 0x800>;
1250 reg = <0x0 0xff9a0800 0x0 0x100>;
1254 #iommu-cells = <0>;
1260 reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
1264 #iommu-cells = <0>;
1270 reg = <0x0 0xffa30000 0x0 0x10000>;
1309 reg = <0x0 0xffaa0000 0x0 0x20>;
1314 reg = <0x0 0xffaa0080 0x0 0x20>;
1319 reg = <0x0 0xffad0000 0x0 0x20>;
1324 reg = <0x0 0xffad0100 0x0 0x20>;
1329 reg = <0x0 0xffad0180 0x0 0x20>;
1334 reg = <0x0 0xffad0400 0x0 0x20>;
1339 reg = <0x0 0xffad0480 0x0 0x20>;
1344 reg = <0x0 0xffad0500 0x0 0x20>;
1349 reg = <0x0 0xffad0800 0x0 0x20>;
1354 reg = <0x0 0xffad0880 0x0 0x20>;
1359 reg = <0x0 0xffad0900 0x0 0x20>;
1364 reg = <0x0 0xffae0000 0x0 0x20>;
1369 reg = <0x0 0xffaf0000 0x0 0x20>;
1374 reg = <0x0 0xffaf0080 0x0 0x20>;
1379 reg = <0x0 0xffb20000 0x0 0x4000>;
1380 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
1391 reg = <0x0 0xffb40000 0x0 0x20>;
1398 reg = <0x07 0x10>;
1401 reg = <0x17 0x1>;
1409 #address-cells = <0>;
1411 reg = <0x0 0xffc01000 0x0 0x1000>,
1412 <0x0 0xffc02000 0x0 0x2000>,
1413 <0x0 0xffc04000 0x0 0x2000>,
1414 <0x0 0xffc06000 0x0 0x2000>;
1415 interrupts = <GIC_PPI 9 0xf04>;
1428 reg = <0x0 0xff750000 0x0 0x100>;
1441 reg = <0x0 0xff780000 0x0 0x100>;
1454 reg = <0x0 0xff790000 0x0 0x100>;
1467 reg = <0x0 0xff7a0000 0x0 0x100>;
1480 reg = <0x0 0xff7b0000 0x0 0x100>;
1493 reg = <0x0 0xff7c0000 0x0 0x100>;
1506 reg = <0x0 0xff7d0000 0x0 0x100>;
1519 reg = <0x0 0xff7e0000 0x0 0x100>;
1532 reg = <0x0 0xff7f0000 0x0 0x100>;
1586 rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
1590 rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
1594 rockchip,pins = <0 RK_PA2 1 &pcfg_pull_up>;
1598 rockchip,pins = <0 RK_PA3 1 &pcfg_pull_up>;
1610 rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>,
1611 <0 RK_PC0 1 &pcfg_pull_none>;
1933 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
1937 rockchip,pins = <0 RK_PB2 1 &pcfg_pull_none>;