Lines Matching +full:pcfg +full:-
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
32 key-power {
36 debounce-interval = <100>;
37 wakeup-source;
41 gpio-restart {
42 compatible = "gpio-restart";
44 pinctrl-names = "default";
45 pinctrl-0 = <&ap_warm_reset_h>;
49 emmc_pwrseq: emmc-pwrseq {
50 compatible = "mmc-pwrseq-emmc";
51 pinctrl-0 = <&emmc_reset>;
52 pinctrl-names = "default";
53 reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
56 sdio_pwrseq: sdio-pwrseq {
57 compatible = "mmc-pwrseq-simple";
59 clock-names = "ext_clock";
60 pinctrl-names = "default";
61 pinctrl-0 = <&wifi_enable_h>;
68 * - SDIO_RESET_L_WL_REG_ON
69 * - PDN (power down when low)
71 reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>;
74 vcc_5v: vcc-5v {
75 compatible = "regulator-fixed";
76 regulator-name = "vcc_5v";
77 regulator-always-on;
78 regulator-boot-on;
79 regulator-min-microvolt = <5000000>;
80 regulator-max-microvolt = <5000000>;
83 vcc33_sys: vcc33-sys {
84 compatible = "regulator-fixed";
85 regulator-name = "vcc33_sys";
86 regulator-always-on;
87 regulator-boot-on;
88 regulator-min-microvolt = <3300000>;
89 regulator-max-microvolt = <3300000>;
92 vcc50_hdmi: vcc50-hdmi {
93 compatible = "regulator-fixed";
94 regulator-name = "vcc50_hdmi";
95 regulator-always-on;
96 regulator-boot-on;
97 vin-supply = <&vcc_5v>;
100 vdd_logic: vdd-logic {
101 compatible = "pwm-regulator";
102 regulator-name = "vdd_logic";
105 pwm-supply = <&vcc33_sys>;
107 pwm-dutycycle-range = <0x7b 0>;
108 pwm-dutycycle-unit = <0x94>;
110 regulator-always-on;
111 regulator-boot-on;
112 regulator-min-microvolt = <950000>;
113 regulator-max-microvolt = <1350000>;
114 regulator-ramp-delay = <4000>;
119 cpu0-supply = <&vdd_cpu>;
126 /* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */
128 /delete-node/ opp-312000000;
130 opp-1512000000 {
131 opp-microvolt = <1250000>;
133 opp-1608000000 {
134 opp-microvolt = <1300000>;
136 opp-1704000000 {
137 opp-hz = /bits/ 64 <1704000000>;
138 opp-microvolt = <1350000>;
140 opp-1800000000 {
141 opp-hz = /bits/ 64 <1800000000>;
142 opp-microvolt = <1400000>;
149 bus-width = <8>;
150 cap-mmc-highspeed;
151 rockchip,default-sample-phase = <158>;
152 disable-wp;
153 mmc-hs200-1_8v;
154 mmc-pwrseq = <&emmc_pwrseq>;
155 non-removable;
156 pinctrl-names = "default";
157 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
161 mali-supply = <&vdd_gpu>;
174 pinctrl-names = "default", "unwedge";
175 pinctrl-0 = <&hdmi_ddc>;
176 pinctrl-1 = <&hdmi_ddc_unwedge>;
183 clock-frequency = <400000>;
184 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
185 i2c-scl-rising-time-ns = <100>; /* 45ns measured */
190 clock-output-names = "xin32k", "wifibt_32kin";
191 interrupt-parent = <&gpio0>;
193 pinctrl-names = "default";
194 pinctrl-0 = <&pmic_int_l>;
195 rockchip,system-power-controller;
196 wakeup-source;
197 #clock-cells = <1>;
199 vcc1-supply = <&vcc33_sys>;
200 vcc2-supply = <&vcc33_sys>;
201 vcc3-supply = <&vcc33_sys>;
202 vcc4-supply = <&vcc33_sys>;
203 vcc6-supply = <&vcc_5v>;
204 vcc7-supply = <&vcc33_sys>;
205 vcc8-supply = <&vcc33_sys>;
206 vcc12-supply = <&vcc_18>;
207 vddio-supply = <&vcc33_io>;
211 regulator-name = "vdd_arm";
212 regulator-always-on;
213 regulator-boot-on;
214 regulator-min-microvolt = <750000>;
215 regulator-max-microvolt = <1450000>;
216 regulator-ramp-delay = <6001>;
217 regulator-state-mem {
218 regulator-off-in-suspend;
223 regulator-name = "vdd_gpu";
224 regulator-always-on;
225 regulator-boot-on;
226 regulator-min-microvolt = <800000>;
227 regulator-max-microvolt = <1250000>;
228 regulator-ramp-delay = <6001>;
229 regulator-state-mem {
230 regulator-off-in-suspend;
235 regulator-name = "vcc135_ddr";
236 regulator-always-on;
237 regulator-boot-on;
238 regulator-state-mem {
239 regulator-on-in-suspend;
251 regulator-name = "vcc_18";
252 regulator-always-on;
253 regulator-boot-on;
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-state-mem {
257 regulator-on-in-suspend;
258 regulator-suspend-microvolt = <1800000>;
270 regulator-name = "vcc33_io";
271 regulator-always-on;
272 regulator-boot-on;
273 regulator-min-microvolt = <3300000>;
274 regulator-max-microvolt = <3300000>;
275 regulator-state-mem {
276 regulator-on-in-suspend;
277 regulator-suspend-microvolt = <3300000>;
282 regulator-name = "vdd_10";
283 regulator-always-on;
284 regulator-boot-on;
285 regulator-min-microvolt = <1000000>;
286 regulator-max-microvolt = <1000000>;
287 regulator-state-mem {
288 regulator-on-in-suspend;
289 regulator-suspend-microvolt = <1000000>;
294 regulator-name = "vdd10_lcd_pwren_h";
295 regulator-always-on;
296 regulator-boot-on;
297 regulator-min-microvolt = <2500000>;
298 regulator-max-microvolt = <2500000>;
299 regulator-state-mem {
300 regulator-off-in-suspend;
305 regulator-name = "vcc33_lcd";
306 regulator-always-on;
307 regulator-boot-on;
308 regulator-state-mem {
309 regulator-off-in-suspend;
319 clock-frequency = <400000>;
320 i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
321 i2c-scl-rising-time-ns = <100>; /* 40ns measured */
326 powered-while-suspended;
334 clock-frequency = <100000>;
335 i2c-scl-falling-time-ns = <50>; /* 10ns measured */
336 i2c-scl-rising-time-ns = <800>; /* 600ns measured */
342 clock-frequency = <400000>;
343 i2c-scl-falling-time-ns = <50>; /* 11ns measured */
344 i2c-scl-rising-time-ns = <300>; /* 225ns measured */
350 bb-supply = <&vcc33_io>;
351 dvp-supply = <&vcc_18>;
352 flash0-supply = <&vcc18_flashio>;
353 gpio1830-supply = <&vcc33_io>;
354 gpio30-supply = <&vcc33_io>;
355 lcdc-supply = <&vcc33_lcd>;
356 wifi-supply = <&vcc18_wl>;
366 bus-width = <4>;
367 cap-sd-highspeed;
368 cap-sdio-irq;
369 keep-power-in-suspend;
370 mmc-pwrseq = <&sdio_pwrseq>;
371 non-removable;
372 pinctrl-names = "default";
373 pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
374 sd-uhs-sdr12;
375 sd-uhs-sdr25;
376 sd-uhs-sdr50;
377 sd-uhs-sdr104;
378 vmmc-supply = <&vcc33_sys>;
379 vqmmc-supply = <&vcc18_wl>;
385 rx-sample-delay-ns = <12>;
388 compatible = "jedec,spi-nor";
389 spi-max-frequency = <50000000>;
397 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
398 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
399 rockchip,hw-tshut-temp = <125000>;
406 pinctrl-names = "default";
407 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
425 needs-reset-on-resume;
430 snps,need-phy-for-wake;
436 assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
437 assigned-clock-parents = <&usbphy0>;
439 snps,need-phy-for-wake;
455 pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
456 bias-disable;
457 drive-strength = <8>;
460 pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
461 bias-pull-up;
462 drive-strength = <8>;
465 pcfg_output_high: pcfg-output-high {
466 output-high;
469 pcfg_output_low: pcfg-output-low {
470 output-low;
474 pwr_key_l: pwr-key-l {
480 emmc_reset: emmc-reset {
488 emmc_clk: emmc-clk {
492 emmc_cmd: emmc-cmd {
496 emmc_bus8: emmc-bus8 {
509 pmic_int_l: pmic-int-l {
515 ap_warm_reset_h: ap-warm-reset-h {
520 recovery-switch {
521 rec_mode_l: rec-mode-l {
527 wifi_enable_h: wifienable-h {
532 bt_enable_l: bt-enable-l {
536 bt_host_wake: bt-host-wake {
540 bt_host_wake_l: bt-host-wake-l {
548 sdio0_bus4: sdio0-bus4 {
555 sdio0_cmd: sdio0-cmd {
559 sdio0_clk: sdio0-clk {
569 bt_dev_wake_sleep: bt-dev-wake-sleep {
573 bt_dev_wake_awake: bt-dev-wake-awake {
577 bt_dev_wake: bt-dev-wake {
583 tpm_int_h: tpm-int-h {
588 write-protect {
589 fw_wp_ap: fw-wp-ap {