Lines Matching full:cru
7 #include <dt-bindings/clock/rk3036-cru.h>
41 resets = <&cru SRST_CORE0>;
47 clocks = <&cru ARMCLK>;
54 resets = <&cru SRST_CORE1>;
111 assigned-clocks = <&cru SCLK_GPU>;
113 clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>;
116 resets = <&cru SRST_GPU>;
125 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
135 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
145 clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>;
147 resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>;
167 clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>;
207 clocks = <&cru HCLK_OTG0>;
221 clocks = <&cru HCLK_OTG1>;
232 clocks = <&cru HCLK_MAC>, <&cru SCLK_MACREF>, <&cru SCLK_MAC>;
239 assigned-clocks = <&cru SCLK_MACPLL>;
240 assigned-clock-parents = <&cru PLL_DPLL>;
251 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
255 resets = <&cru SRST_MMC0>;
264 clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
265 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
269 resets = <&cru SRST_SDIO>;
282 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
283 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
294 resets = <&cru SRST_EMMC>;
304 clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
318 clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
320 assigned-clocks = <&cru SCLK_NANDC>;
328 cru: clock-controller@20000000 { label
329 compatible = "rockchip,rk3036-cru";
336 assigned-clocks = <&cru PLL_GPLL>;
352 clocks = <&cru ACLK_LCDC>,
353 <&cru HCLK_LCDC>,
354 <&cru SCLK_LCDC>;
361 clocks = <&cru ACLK_VCODEC>,
362 <&cru HCLK_VCODEC>;
369 clocks = <&cru SCLK_GPU>;
390 clocks = <&cru PCLK_ACODEC>;
398 clocks = <&cru PCLK_HDMI>;
419 clocks = <&cru PCLK_TIMER>, <&xin24m>;
427 clocks = <&cru PCLK_PWM>;
437 clocks = <&cru PCLK_PWM>;
447 clocks = <&cru PCLK_PWM>;
457 clocks = <&cru PCLK_PWM>;
470 clocks = <&cru PCLK_I2C1>;
483 clocks = <&cru PCLK_I2C2>;
496 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
510 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
524 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
538 clocks = <&cru PCLK_I2C0>;
548 clocks = <&cru PCLK_SPI>, <&cru SCLK_SPI>;
567 clocks = <&cru ACLK_DMAC2>;
582 clocks = <&cru PCLK_GPIO0>;
595 clocks = <&cru PCLK_GPIO1>;
608 clocks = <&cru PCLK_GPIO2>;