Lines Matching +full:rcar +full:- +full:gen2 +full:- +full:can

1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 /* External CAN clock */
38 can_clk: can {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
42 clock-frequency = <0>;
46 #address-cells = <1>;
47 #size-cells = <0>;
51 compatible = "arm,cortex-a15";
53 clock-frequency = <1000000000>;
55 power-domains = <&sysc R8A7792_PD_CA15_CPU0>;
56 enable-method = "renesas,apmu";
57 next-level-cache = <&L2_CA15>;
62 compatible = "arm,cortex-a15";
64 clock-frequency = <1000000000>;
66 power-domains = <&sysc R8A7792_PD_CA15_CPU1>;
67 enable-method = "renesas,apmu";
68 next-level-cache = <&L2_CA15>;
71 L2_CA15: cache-controller-0 {
73 cache-unified;
74 cache-level = <2>;
75 power-domains = <&sysc R8A7792_PD_CA15_SCU>;
81 compatible = "fixed-clock";
82 #clock-cells = <0>;
84 clock-frequency = <0>;
88 compatible = "arm,cortex-a15-pmu";
89 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
91 interrupt-affinity = <&cpu0>, <&cpu1>;
96 compatible = "fixed-clock";
97 #clock-cells = <0>;
99 clock-frequency = <0>;
103 compatible = "simple-bus";
104 interrupt-parent = <&gic>;
106 #address-cells = <2>;
107 #size-cells = <2>;
111 compatible = "renesas,r8a7792-wdt",
112 "renesas,rcar-gen2-wdt";
116 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
122 compatible = "renesas,gpio-r8a7792",
123 "renesas,rcar-gen2-gpio";
126 #gpio-cells = <2>;
127 gpio-controller;
128 gpio-ranges = <&pfc 0 0 29>;
129 #interrupt-cells = <2>;
130 interrupt-controller;
132 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
137 compatible = "renesas,gpio-r8a7792",
138 "renesas,rcar-gen2-gpio";
141 #gpio-cells = <2>;
142 gpio-controller;
143 gpio-ranges = <&pfc 0 32 23>;
144 #interrupt-cells = <2>;
145 interrupt-controller;
147 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
152 compatible = "renesas,gpio-r8a7792",
153 "renesas,rcar-gen2-gpio";
156 #gpio-cells = <2>;
157 gpio-controller;
158 gpio-ranges = <&pfc 0 64 32>;
159 #interrupt-cells = <2>;
160 interrupt-controller;
162 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
167 compatible = "renesas,gpio-r8a7792",
168 "renesas,rcar-gen2-gpio";
171 #gpio-cells = <2>;
172 gpio-controller;
173 gpio-ranges = <&pfc 0 96 28>;
174 #interrupt-cells = <2>;
175 interrupt-controller;
177 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
182 compatible = "renesas,gpio-r8a7792",
183 "renesas,rcar-gen2-gpio";
186 #gpio-cells = <2>;
187 gpio-controller;
188 gpio-ranges = <&pfc 0 128 17>;
189 #interrupt-cells = <2>;
190 interrupt-controller;
192 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
197 compatible = "renesas,gpio-r8a7792",
198 "renesas,rcar-gen2-gpio";
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 160 17>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
207 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
212 compatible = "renesas,gpio-r8a7792",
213 "renesas,rcar-gen2-gpio";
216 #gpio-cells = <2>;
217 gpio-controller;
218 gpio-ranges = <&pfc 0 192 17>;
219 #interrupt-cells = <2>;
220 interrupt-controller;
222 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
227 compatible = "renesas,gpio-r8a7792",
228 "renesas,rcar-gen2-gpio";
231 #gpio-cells = <2>;
232 gpio-controller;
233 gpio-ranges = <&pfc 0 224 17>;
234 #interrupt-cells = <2>;
235 interrupt-controller;
237 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
242 compatible = "renesas,gpio-r8a7792",
243 "renesas,rcar-gen2-gpio";
246 #gpio-cells = <2>;
247 gpio-controller;
248 gpio-ranges = <&pfc 0 256 17>;
249 #interrupt-cells = <2>;
250 interrupt-controller;
252 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
257 compatible = "renesas,gpio-r8a7792",
258 "renesas,rcar-gen2-gpio";
261 #gpio-cells = <2>;
262 gpio-controller;
263 gpio-ranges = <&pfc 0 288 17>;
264 #interrupt-cells = <2>;
265 interrupt-controller;
267 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
272 compatible = "renesas,gpio-r8a7792",
273 "renesas,rcar-gen2-gpio";
276 #gpio-cells = <2>;
277 gpio-controller;
278 gpio-ranges = <&pfc 0 320 32>;
279 #interrupt-cells = <2>;
280 interrupt-controller;
282 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
287 compatible = "renesas,gpio-r8a7792",
288 "renesas,rcar-gen2-gpio";
291 #gpio-cells = <2>;
292 gpio-controller;
293 gpio-ranges = <&pfc 0 352 30>;
294 #interrupt-cells = <2>;
295 interrupt-controller;
297 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
302 compatible = "renesas,pfc-r8a7792";
306 cpg: clock-controller@e6150000 {
307 compatible = "renesas,r8a7792-cpg-mssr";
310 clock-names = "extal";
311 #clock-cells = <2>;
312 #power-domain-cells = <0>;
313 #reset-cells = <1>;
317 compatible = "renesas,r8a7792-apmu", "renesas,apmu";
322 rst: reset-controller@e6160000 {
323 compatible = "renesas,r8a7792-rst";
327 sysc: system-controller@e6180000 {
328 compatible = "renesas,r8a7792-sysc";
330 #power-domain-cells = <1>;
333 irqc: interrupt-controller@e61c0000 {
334 compatible = "renesas,irqc-r8a7792", "renesas,irqc";
335 #interrupt-cells = <2>;
336 interrupt-controller;
343 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
348 compatible = "mmio-sram";
350 #address-cells = <1>;
351 #size-cells = <1>;
356 compatible = "mmio-sram";
358 #address-cells = <1>;
359 #size-cells = <1>;
362 smp-sram@0 {
363 compatible = "renesas,smp-sram";
370 compatible = "renesas,i2c-r8a7792",
371 "renesas,rcar-gen2-i2c";
375 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
377 i2c-scl-internal-delay-ns = <6>;
378 #address-cells = <1>;
379 #size-cells = <0>;
384 compatible = "renesas,i2c-r8a7792",
385 "renesas,rcar-gen2-i2c";
389 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
391 i2c-scl-internal-delay-ns = <6>;
392 #address-cells = <1>;
393 #size-cells = <0>;
398 compatible = "renesas,i2c-r8a7792",
399 "renesas,rcar-gen2-i2c";
403 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
405 i2c-scl-internal-delay-ns = <6>;
406 #address-cells = <1>;
407 #size-cells = <0>;
412 compatible = "renesas,i2c-r8a7792",
413 "renesas,rcar-gen2-i2c";
417 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
419 i2c-scl-internal-delay-ns = <6>;
420 #address-cells = <1>;
421 #size-cells = <0>;
426 compatible = "renesas,i2c-r8a7792",
427 "renesas,rcar-gen2-i2c";
431 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
433 i2c-scl-internal-delay-ns = <6>;
434 #address-cells = <1>;
435 #size-cells = <0>;
440 compatible = "renesas,i2c-r8a7792",
441 "renesas,rcar-gen2-i2c";
445 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
447 i2c-scl-internal-delay-ns = <110>;
448 #address-cells = <1>;
449 #size-cells = <0>;
454 #address-cells = <1>;
455 #size-cells = <0>;
456 compatible = "renesas,iic-r8a7792",
457 "renesas,rcar-gen2-iic",
458 "renesas,rmobile-iic";
464 dma-names = "tx", "rx", "tx", "rx";
465 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
470 dmac0: dma-controller@e6700000 {
471 compatible = "renesas,dmac-r8a7792",
472 "renesas,rcar-dmac";
490 interrupt-names = "error",
496 clock-names = "fck";
497 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
499 #dma-cells = <1>;
500 dma-channels = <15>;
503 dmac1: dma-controller@e6720000 {
504 compatible = "renesas,dmac-r8a7792",
505 "renesas,rcar-dmac";
523 interrupt-names = "error",
529 clock-names = "fck";
530 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
532 #dma-cells = <1>;
533 dma-channels = <15>;
537 compatible = "renesas,etheravb-r8a7792",
538 "renesas,etheravb-rcar-gen2";
542 clock-names = "fck";
543 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
545 #address-cells = <1>;
546 #size-cells = <0>;
551 compatible = "renesas,qspi-r8a7792", "renesas,qspi";
557 dma-names = "tx", "rx", "tx", "rx";
558 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
560 num-cs = <1>;
561 #address-cells = <1>;
562 #size-cells = <0>;
567 compatible = "renesas,scif-r8a7792",
568 "renesas,rcar-gen2-scif", "renesas,scif";
573 clock-names = "fck", "brg_int", "scif_clk";
576 dma-names = "tx", "rx", "tx", "rx";
577 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
583 compatible = "renesas,scif-r8a7792",
584 "renesas,rcar-gen2-scif", "renesas,scif";
589 clock-names = "fck", "brg_int", "scif_clk";
592 dma-names = "tx", "rx", "tx", "rx";
593 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
599 compatible = "renesas,scif-r8a7792",
600 "renesas,rcar-gen2-scif", "renesas,scif";
605 clock-names = "fck", "brg_int", "scif_clk";
608 dma-names = "tx", "rx", "tx", "rx";
609 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
615 compatible = "renesas,scif-r8a7792",
616 "renesas,rcar-gen2-scif", "renesas,scif";
621 clock-names = "fck", "brg_int", "scif_clk";
624 dma-names = "tx", "rx", "tx", "rx";
625 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
631 compatible = "renesas,hscif-r8a7792",
632 "renesas,rcar-gen2-hscif", "renesas,hscif";
637 clock-names = "fck", "brg_int", "scif_clk";
640 dma-names = "tx", "rx", "tx", "rx";
641 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
647 compatible = "renesas,hscif-r8a7792",
648 "renesas,rcar-gen2-hscif", "renesas,hscif";
653 clock-names = "fck", "brg_int", "scif_clk";
656 dma-names = "tx", "rx", "tx", "rx";
657 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
663 compatible = "renesas,msiof-r8a7792",
664 "renesas,rcar-gen2-msiof";
670 dma-names = "tx", "rx", "tx", "rx";
671 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
673 #address-cells = <1>;
674 #size-cells = <0>;
679 compatible = "renesas,msiof-r8a7792",
680 "renesas,rcar-gen2-msiof";
686 dma-names = "tx", "rx", "tx", "rx";
687 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
689 #address-cells = <1>;
690 #size-cells = <0>;
694 can0: can@e6e80000 {
695 compatible = "renesas,can-r8a7792",
696 "renesas,rcar-gen2-can";
701 clock-names = "clkp1", "clkp2", "can_clk";
702 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
707 can1: can@e6e88000 {
708 compatible = "renesas,can-r8a7792",
709 "renesas,rcar-gen2-can";
714 clock-names = "clkp1", "clkp2", "can_clk";
715 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
721 compatible = "renesas,vin-r8a7792",
722 "renesas,rcar-gen2-vin";
726 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
732 compatible = "renesas,vin-r8a7792",
733 "renesas,rcar-gen2-vin";
737 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
743 compatible = "renesas,vin-r8a7792",
744 "renesas,rcar-gen2-vin";
748 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
754 compatible = "renesas,vin-r8a7792",
755 "renesas,rcar-gen2-vin";
759 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
765 compatible = "renesas,vin-r8a7792",
766 "renesas,rcar-gen2-vin";
770 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
776 compatible = "renesas,vin-r8a7792",
777 "renesas,rcar-gen2-vin";
781 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
787 compatible = "renesas,sdhi-r8a7792",
788 "renesas,rcar-gen2-sdhi";
793 dma-names = "tx", "rx", "tx", "rx";
795 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
800 gic: interrupt-controller@f1001000 {
801 compatible = "arm,gic-400";
802 #interrupt-cells = <3>;
803 interrupt-controller;
811 clock-names = "clk";
812 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
821 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
830 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
839 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
843 jpu: jpeg-codec@fe980000 {
844 compatible = "renesas,jpu-r8a7792",
845 "renesas,rcar-gen2-jpu";
849 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
854 compatible = "renesas,du-r8a7792";
859 clock-names = "du.0", "du.1";
861 reset-names = "du.0";
865 #address-cells = <1>;
866 #size-cells = <0>;
887 compatible = "renesas,r8a7792-cmt0",
888 "renesas,rcar-gen2-cmt0";
893 clock-names = "fck";
894 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
901 compatible = "renesas,r8a7792-cmt1",
902 "renesas,rcar-gen2-cmt1";
913 clock-names = "fck";
914 power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
922 compatible = "arm,armv7-timer";
923 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,