Lines Matching full:cpg_clocks

27 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
35 			clocks = <&cpg_clocks R8A73A4_CLK_Z>;
43 			clocks = <&cpg_clocks R8A73A4_CLK_Z2>;
479 		cpg_clocks: cpg_clocks@e6150000 {  label
495 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
502 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
509 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
516 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
523 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
530 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
537 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
545 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
553 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
561 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
569 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
577 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
584 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
591 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
598 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2S>;
604 			clocks = <&cpg_clocks R8A73A4_CLK_PLL2H>, <&pll1_div2_clk>,
605 				 <&cpg_clocks R8A73A4_CLK_PLL2S>, <0>;
611 			clocks = <&pll1_div2_clk>, <&cpg_clocks R8A73A4_CLK_PLL2S>,
619 			clocks = <&cpg_clocks R8A73A4_CLK_MAIN>;
626 			clocks = <&cpg_clocks R8A73A4_CLK_PLL0>;
633 			clocks = <&cpg_clocks R8A73A4_CLK_PLL1>;
651 				 <&mp_clk>, <&mp_clk>, <&cpg_clocks R8A73A4_CLK_HP>;
666 			clocks = <&cpg_clocks R8A73A4_CLK_HP>, <&mmc1_clk>,
668 				 <&mmc0_clk>, <&cpg_clocks R8A73A4_CLK_HP>,
669 				 <&cpg_clocks R8A73A4_CLK_HP>, <&cpg_clocks
670 				 R8A73A4_CLK_HP>, <&cpg_clocks
689 			clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
691 				 <&cpg_clocks R8A73A4_CLK_HP>,
692 				 <&cpg_clocks R8A73A4_CLK_HP>;
705 			clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>;