Lines Matching +full:ipa +full:- +full:ap +full:- +full:to +full:- +full:modem
1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
18 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
19 interrupt-parent = <&intc>;
27 xo_board: xo-board {
28 compatible = "fixed-clock";
29 clock-frequency = <76800000>;
30 clock-output-names = "xo_board";
31 #clock-cells = <0>;
34 sleep_clk: sleep-clk {
35 compatible = "fixed-clock";
36 clock-frequency = <32764>;
37 clock-output-names = "sleep_clk";
38 #clock-cells = <0>;
41 nand_clk_dummy: nand-clk-dummy {
42 compatible = "fixed-clock";
43 clock-frequency = <32764>;
44 #clock-cells = <0>;
49 #address-cells = <1>;
50 #size-cells = <0>;
54 compatible = "arm,cortex-a7";
56 enable-method = "psci";
58 power-domains = <&rpmhpd SDX65_CX_AO>;
59 power-domain-names = "rpmhpd";
60 operating-points-v2 = <&cpu_opp_table>;
64 cpu_opp_table: cpu-opp-table {
65 compatible = "operating-points-v2";
66 opp-shared;
68 opp-345600000 {
69 opp-hz = /bits/ 64 <345600000>;
70 required-opps = <&rpmhpd_opp_low_svs>;
73 opp-576000000 {
74 opp-hz = /bits/ 64 <576000000>;
75 required-opps = <&rpmhpd_opp_svs>;
78 opp-1094400000 {
79 opp-hz = /bits/ 64 <1094400000>;
80 required-opps = <&rpmhpd_opp_nom>;
83 opp-1497600000 {
84 opp-hz = /bits/ 64 <1497600000>;
85 required-opps = <&rpmhpd_opp_turbo>;
91 compatible = "qcom,scm-sdx65", "qcom,scm";
95 mc_virt: interconnect-mc-virt {
96 compatible = "qcom,sdx65-mc-virt";
97 #interconnect-cells = <1>;
98 qcom,bcm-voters = <&apps_bcm_voter>;
102 compatible = "arm,psci-1.0";
106 reserved_memory: reserved-memory {
107 #address-cells = <1>;
108 #size-cells = <1>;
112 no-map;
117 no-map;
122 no-map;
127 no-map;
132 no-map;
140 no-map;
143 cmd_db: reserved-memory@8fee0000 {
144 compatible = "qcom,cmd-db";
146 no-map;
150 no-map;
155 no-map;
160 no-map;
165 smp2p-mpss {
170 qcom,local-pid = <0>;
171 qcom,remote-pid = <1>;
173 modem_smp2p_out: master-kernel {
174 qcom,entry-name = "master-kernel";
175 #qcom,smem-state-cells = <1>;
178 modem_smp2p_in: slave-kernel {
179 qcom,entry-name = "slave-kernel";
180 interrupt-controller;
181 #interrupt-cells = <2>;
184 ipa_smp2p_out: ipa-ap-to-modem {
185 qcom,entry-name = "ipa";
186 #qcom,smem-state-cells = <1>;
189 ipa_smp2p_in: ipa-modem-to-ap {
190 qcom,entry-name = "ipa";
191 interrupt-controller;
192 #interrupt-cells = <2>;
197 #address-cells = <1>;
198 #size-cells = <1>;
200 compatible = "simple-bus";
202 gcc: clock-controller@100000 {
203 compatible = "qcom,gcc-sdx65";
206 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
207 #power-domain-cells = <1>;
208 #clock-cells = <1>;
209 #reset-cells = <1>;
213 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
217 clock-names = "core", "iface";
222 compatible = "qcom,usb-snps-hs-7nm-phy";
224 #phy-cells = <0>;
227 clock-names = "ref";
232 compatible = "qcom,sdx65-qmp-usb3-uni-phy";
235 #address-cells = <1>;
236 #size-cells = <1>;
242 clock-names = "aux", "cfg_ahb", "ref";
246 reset-names = "phy", "common";
252 #phy-cells = <0>;
253 #clock-cells = <0>;
255 clock-names = "pipe0";
256 clock-output-names = "usb3_uni_phy_pipe_clk_src";
261 compatible = "qcom,sdx65-system-noc";
263 #interconnect-cells = <1>;
264 qcom,bcm-voters = <&apps_bcm_voter>;
267 qpic_bam: dma-controller@1b04000 {
268 compatible = "qcom,bam-v1.7.0";
272 clock-names = "bam_clk";
273 #dma-cells = <1>;
275 qcom,controlled-remotely;
279 qpic_nand: nand-controller@1b30000 {
280 compatible = "qcom,sdx55-nand";
282 #address-cells = <1>;
283 #size-cells = <0>;
286 clock-names = "core", "aon";
291 dma-names = "tx", "rx", "cmd";
296 compatible = "qcom,tcsr-mutex";
298 #hwlock-cells = <1>;
302 compatible = "qcom,sdx55-mpss-pas";
305 interrupts-extended = <&intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
311 interrupt-names = "wdog", "fatal", "ready", "handover",
312 "stop-ack", "shutdown-ack";
315 clock-names = "xo";
317 power-domains = <&rpmhpd SDX65_CX>,
319 power-domain-names = "cx", "mss";
321 qcom,smem-states = <&modem_smp2p_out 0>;
322 qcom,smem-state-names = "stop";
326 glink-edge {
329 qcom,remote-pid = <1>;
335 compatible = "qcom,sdx65-sdhci", "qcom,sdhci-msm-v5";
337 reg-names = "hc";
340 interrupt-names = "hc_irq", "pwr_irq";
343 clock-names = "core", "iface";
348 compatible = "qcom,sdx65-mem-noc";
350 #interconnect-cells = <1>;
351 qcom,bcm-voters = <&apps_bcm_voter>;
355 compatible = "qcom,sdx65-dwc3", "qcom,dwc3";
358 #address-cells = <1>;
359 #size-cells = <1>;
367 clock-names = "cfg_noc", "core", "iface", "mock_utmi",
370 assigned-clocks = <&gcc GCC_USB30_MOCK_UTMI_CLK>,
372 assigned-clock-rates = <19200000>, <200000000>;
374 interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
378 interrupt-names = "hs_phy_irq",
383 power-domains = <&gcc USB30_GDSC>;
395 phy-names = "usb2-phy", "usb3-phy";
405 compatible = "qcom,spmi-pmic-arb";
411 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
412 interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
413 interrupt-names = "periph_irq";
414 interrupt-controller;
415 #interrupt-cells = <4>;
416 #address-cells = <2>;
417 #size-cells = <0>;
418 cell-index = <0>;
424 compatible = "qcom,sdx65-tlmm";
427 gpio-controller;
428 #gpio-cells = <2>;
429 gpio-ranges = <&tlmm 0 0 109>;
430 interrupt-controller;
431 interrupt-parent = <&intc>;
432 #interrupt-cells = <2>;
435 pdc: interrupt-controller@b210000 {
436 compatible = "qcom,sdx65-pdc", "qcom,pdc";
438 qcom,pdc-ranges = <0 147 52>, <52 266 32>;
439 #interrupt-cells = <2>;
440 interrupt-parent = <&intc>;
441 interrupt-controller;
445 compatible = "simple-mfd";
448 #address-cells = <1>;
449 #size-cells = <1>;
451 pil-reloc@94c {
452 compatible = "qcom,pil-reloc-info";
458 compatible = "qcom,sdx65-smmu-500", "arm,mmu-500";
460 #iommu-cells = <2>;
461 #global-interrupts = <1>;
497 intc: interrupt-controller@17800000 {
498 compatible = "qcom,msm-qgic2";
499 interrupt-controller;
500 interrupt-parent = <&intc>;
501 #interrupt-cells = <3>;
507 compatible = "qcom,sdx55-a7pll";
510 clock-names = "bi_tcxo";
511 #clock-cells = <0>;
515 compatible = "qcom,sdx55-apcs-gcc", "syscon";
517 #mbox-cells = <1>;
519 clock-names = "ref", "pll", "aux";
520 #clock-cells = <0>;
524 compatible = "qcom,apss-wdt-sdx65", "qcom,kpss-wdt";
530 #address-cells = <1>;
531 #size-cells = <1>;
533 compatible = "arm,armv7-timer-mem";
535 clock-frequency = <19200000>;
538 frame-number = <0>;
546 frame-number = <1>;
553 frame-number = <2>;
560 frame-number = <3>;
567 frame-number = <4>;
574 frame-number = <5>;
581 frame-number = <6>;
588 frame-number = <7>;
597 compatible = "qcom,rpmh-rsc";
600 reg-names = "drv-0", "drv-1";
603 qcom,tcs-offset = <0xd00>;
604 qcom,drv-id = <1>;
605 qcom,tcs-config = <ACTIVE_TCS 2>,
610 rpmhcc: clock-controller {
611 compatible = "qcom,sdx65-rpmh-clk";
612 #clock-cells = <1>;
613 clock-names = "xo";
617 rpmhpd: power-controller {
618 compatible = "qcom,sdx65-rpmhpd";
619 #power-domain-cells = <1>;
620 operating-points-v2 = <&rpmhpd_opp_table>;
622 rpmhpd_opp_table: opp-table {
623 compatible = "operating-points-v2";
626 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
630 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
634 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
638 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
642 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
646 opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
650 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
654 opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
658 opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
662 opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
667 apps_bcm_voter: bcm-voter {
668 compatible = "qcom,bcm-voter";
675 compatible = "arm,armv7-timer";
680 clock-frequency = <19200000>;