Lines Matching +full:pm8921 +full:- +full:gpio
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
62 #address-cells = <1>;
63 #size-cells = <0>;
66 compatible = "arm,cortex-a5";
68 next-level-cache = <&L2>;
72 cpu-pmu {
73 compatible = "arm,cortex-a5-pmu";
79 compatible = "fixed-clock";
80 #clock-cells = <0>;
81 clock-frequency = <19200000>;
86 vsdcc_fixed: vsdcc-regulator {
87 compatible = "regulator-fixed";
88 regulator-name = "SDCC Power";
89 regulator-min-microvolt = <2700000>;
90 regulator-max-microvolt = <2700000>;
91 regulator-always-on;
96 #address-cells = <1>;
97 #size-cells = <1>;
99 compatible = "simple-bus";
101 L2: cache-controller@2040000 {
102 compatible = "arm,pl310-cache";
104 arm,data-latency = <2 2 0>;
105 cache-unified;
106 cache-level = <2>;
109 intc: interrupt-controller@2000000 {
110 compatible = "qcom,msm-qgic2";
111 interrupt-controller;
112 #interrupt-cells = <3>;
118 compatible = "qcom,kpss-timer", "qcom,msm-timer";
123 clock-frequency = <27000000>,
125 cpu-offset = <0x80000>;
129 compatible = "qcom,mdm9615-pinctrl";
130 gpio-controller;
131 gpio-ranges = <&msmgpio 0 0 88>;
132 #gpio-cells = <2>;
134 interrupt-controller;
135 #interrupt-cells = <2>;
139 gcc: clock-controller@900000 {
140 compatible = "qcom,gcc-mdm9615";
141 #clock-cells = <1>;
142 #power-domain-cells = <1>;
143 #reset-cells = <1>;
147 lcc: clock-controller@28000000 {
148 compatible = "qcom,lcc-mdm9615";
150 #clock-cells = <1>;
151 #reset-cells = <1>;
154 l2cc: clock-controller@2011000 {
155 compatible = "qcom,kpss-gcc", "syscon";
163 clock-names = "core";
164 assigned-clocks = <&gcc PRNG_CLK>;
165 assigned-clock-rates = <32000000>;
169 compatible = "qcom,gsbi-v1.0.0";
170 cell-index = <2>;
173 clock-names = "iface";
175 #address-cells = <1>;
176 #size-cells = <1>;
180 compatible = "qcom,i2c-qup-v1.1.1";
181 #address-cells = <1>;
182 #size-cells = <0>;
187 clock-names = "core", "iface";
193 compatible = "qcom,gsbi-v1.0.0";
194 cell-index = <3>;
197 clock-names = "iface";
199 #address-cells = <1>;
200 #size-cells = <1>;
204 compatible = "qcom,spi-qup-v1.1.1";
205 #address-cells = <1>;
206 #size-cells = <0>;
209 spi-max-frequency = <24000000>;
212 clock-names = "core", "iface";
218 compatible = "qcom,gsbi-v1.0.0";
219 cell-index = <4>;
222 clock-names = "iface";
224 #address-cells = <1>;
225 #size-cells = <1>;
228 syscon-tcsr = <&tcsr>;
231 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
236 clock-names = "core", "iface";
242 compatible = "qcom,gsbi-v1.0.0";
243 cell-index = <5>;
246 clock-names = "iface";
248 #address-cells = <1>;
249 #size-cells = <1>;
252 syscon-tcsr = <&tcsr>;
255 compatible = "qcom,i2c-qup-v1.1.1";
256 #address-cells = <1>;
257 #size-cells = <0>;
262 assigned-clocks = <&gcc GSBI5_QUP_CLK>;
263 assigned-clock-rates = <24000000>;
266 clock-names = "core", "iface";
271 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
276 clock-names = "core", "iface";
284 qcom,controller-type = "pmic-arbiter";
287 compatible = "qcom,pm8018", "qcom,pm8921";
289 #interrupt-cells = <2>;
290 interrupt-controller;
291 #address-cells = <1>;
292 #size-cells = <0>;
295 compatible = "qcom,pm8018-pwrkey", "qcom,pm8921-pwrkey";
297 interrupt-parent = <&pmicintc>;
301 pull-up;
305 compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp";
306 interrupt-controller;
307 #interrupt-cells = <2>;
309 gpio-controller;
310 #gpio-cells = <2>;
311 gpio-ranges = <&pmicmpp 0 0 6>;
315 compatible = "qcom,pm8018-rtc", "qcom,pm8921-rtc";
316 interrupt-parent = <&pmicintc>;
319 allow-set-time;
322 pmicgpio: gpio@150 {
323 compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio";
325 interrupt-controller;
326 #interrupt-cells = <2>;
327 gpio-controller;
328 gpio-ranges = <&pmicgpio 0 0 6>;
329 #gpio-cells = <2>;
334 sdcc1bam: dma-controller@12182000{
335 compatible = "qcom,bam-v1.3.0";
339 clock-names = "bam_clk";
340 #dma-cells = <1>;
344 sdcc2bam: dma-controller@12142000{
345 compatible = "qcom,bam-v1.3.0";
349 clock-names = "bam_clk";
350 #dma-cells = <1>;
355 compatible = "simple-bus";
356 #address-cells = <1>;
357 #size-cells = <1>;
362 arm,primecell-periphid = <0x00051180>;
365 interrupt-names = "cmd_irq";
367 clock-names = "mclk", "apb_pclk";
368 bus-width = <8>;
369 max-frequency = <48000000>;
370 cap-sd-highspeed;
371 cap-mmc-highspeed;
372 vmmc-supply = <&vsdcc_fixed>;
374 dma-names = "tx", "rx";
375 assigned-clocks = <&gcc SDC1_CLK>;
376 assigned-clock-rates = <400000>;
381 arm,primecell-periphid = <0x00051180>;
385 interrupt-names = "cmd_irq";
387 clock-names = "mclk", "apb_pclk";
388 bus-width = <4>;
389 cap-sd-highspeed;
390 cap-mmc-highspeed;
391 max-frequency = <48000000>;
392 no-1-8-v;
393 vmmc-supply = <&vsdcc_fixed>;
395 dma-names = "tx", "rx";
396 assigned-clocks = <&gcc SDC2_CLK>;
397 assigned-clock-rates = <400000>;
402 compatible = "qcom,tcsr-mdm9615", "syscon";
407 compatible = "qcom,rpm-mdm9615";
415 interrupt-names = "ack", "err", "wakeup";
418 compatible = "qcom,rpm-pm8018-regulators";
420 vin_lvs1-supply = <&pm8018_s3>;
422 vdd_l7-supply = <&pm8018_s4>;
423 vdd_l8-supply = <&pm8018_s3>;
424 vdd_l9_l10_l11_l12-supply = <&pm8018_s5>;
428 regulator-min-microvolt = <500000>;
429 regulator-max-microvolt = <1150000>;
430 qcom,switch-mode-frequency = <1600000>;
431 bias-pull-down;
435 regulator-min-microvolt = <1225000>;
436 regulator-max-microvolt = <1300000>;
437 qcom,switch-mode-frequency = <1600000>;
438 bias-pull-down;
442 regulator-always-on;
443 regulator-min-microvolt = <1800000>;
444 regulator-max-microvolt = <1800000>;
445 qcom,switch-mode-frequency = <1600000>;
446 bias-pull-down;
450 regulator-min-microvolt = <2100000>;
451 regulator-max-microvolt = <2200000>;
452 qcom,switch-mode-frequency = <1600000>;
453 bias-pull-down;
457 regulator-always-on;
458 regulator-min-microvolt = <1350000>;
459 regulator-max-microvolt = <1350000>;
460 qcom,switch-mode-frequency = <1600000>;
461 bias-pull-down;
466 regulator-always-on;
467 regulator-min-microvolt = <1800000>;
468 regulator-max-microvolt = <1800000>;
469 bias-pull-down;
473 regulator-always-on;
474 regulator-min-microvolt = <1800000>;
475 regulator-max-microvolt = <1800000>;
476 bias-pull-down;
480 regulator-min-microvolt = <3300000>;
481 regulator-max-microvolt = <3300000>;
482 bias-pull-down;
486 regulator-min-microvolt = <2850000>;
487 regulator-max-microvolt = <2850000>;
488 bias-pull-down;
492 regulator-min-microvolt = <1800000>;
493 regulator-max-microvolt = <2850000>;
494 bias-pull-down;
498 regulator-min-microvolt = <1850000>;
499 regulator-max-microvolt = <1900000>;
500 bias-pull-down;
504 regulator-min-microvolt = <1200000>;
505 regulator-max-microvolt = <1200000>;
506 bias-pull-down;
510 regulator-min-microvolt = <750000>;
511 regulator-max-microvolt = <1150000>;
512 bias-pull-down;
516 regulator-min-microvolt = <1050000>;
517 regulator-max-microvolt = <1050000>;
518 bias-pull-down;
522 regulator-min-microvolt = <1050000>;
523 regulator-max-microvolt = <1050000>;
524 bias-pull-down;
528 regulator-min-microvolt = <1050000>;
529 regulator-max-microvolt = <1050000>;
530 bias-pull-down;
534 regulator-min-microvolt = <1850000>;
535 regulator-max-microvolt = <2950000>;
536 bias-pull-down;
540 regulator-min-microvolt = <2850000>;
541 regulator-max-microvolt = <2850000>;
542 bias-pull-down;
547 bias-pull-down;