Lines Matching +full:arm11mp +full:- +full:twd +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ox820.dtsi - Device tree file for Oxford Semiconductor OX820 SoC
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/oxsemi,ox820.h>
10 #include <dt-bindings/reset/oxsemi,ox820.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
20 enable-method = "oxsemi,ox820-smp";
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <25000000>;
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <125000000>;
57 compatible = "fixed-factor-clock";
58 #clock-cells = <0>;
59 clock-div = <4>;
60 clock-mult = <1>;
65 compatible = "fixed-clock";
66 #clock-cells = <0>;
67 clock-frequency = <850000000>;
71 compatible = "fixed-factor-clock";
72 #clock-cells = <0>;
73 clock-div = <2>;
74 clock-mult = <1>;
80 #address-cells = <1>;
81 #size-cells = <1>;
82 compatible = "simple-bus";
84 interrupt-parent = <&gic>;
86 nandc: nand-controller@41000000 {
87 compatible = "oxsemi,ox820-nand";
91 #address-cells = <1>;
92 #size-cells = <0>;
97 compatible = "oxsemi,ox820-dwmac", "snps,dwmac";
101 interrupt-names = "macirq", "eth_wake_irq";
102 mac-address = [000000000000]; /* Filled in by U-Boot */
103 phy-mode = "rgmii";
106 clock-names = "gmac", "stmmaceth";
110 oxsemi,sys-ctrl = <&sys>;
115 apb-bridge@44000000 {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 compatible = "simple-bus";
122 compatible = "oxsemi,ox820-pinctrl";
125 oxsemi,sys-ctrl = <&sys>;
178 compatible = "oxsemi,ox820-gpio";
181 #gpio-cells = <2>;
182 gpio-controller;
183 interrupt-controller;
184 #interrupt-cells = <2>;
186 oxsemi,gpio-bank = <0>;
187 gpio-ranges = <&pinctrl 0 0 32>;
191 compatible = "oxsemi,ox820-gpio";
194 #gpio-cells = <2>;
195 gpio-controller;
196 interrupt-controller;
197 #interrupt-cells = <2>;
199 oxsemi,gpio-bank = <1>;
200 gpio-ranges = <&pinctrl 0 32 18>;
207 reg-shift = <0>;
208 fifo-size = <16>;
209 reg-io-width = <1>;
210 current-speed = <115200>;
211 no-loopback-test;
221 reg-shift = <0>;
222 fifo-size = <16>;
223 reg-io-width = <1>;
224 current-speed = <115200>;
225 no-loopback-test;
232 #address-cells = <1>;
233 #size-cells = <1>;
234 compatible = "simple-bus";
237 intc: interrupt-controller@0 {
238 compatible = "oxsemi,ox820-rps-irq", "oxsemi,ox810se-rps-irq";
239 interrupt-controller;
242 #interrupt-cells = <1>;
243 valid-mask = <0xffffffff>;
244 clear-mask = <0xffffffff>;
247 timer0: timer@200 {
248 compatible = "oxsemi,ox820-rps-timer";
251 interrupt-parent = <&intc>;
256 sys: sys-ctrl@e00000 {
257 compatible = "oxsemi,ox820-sys-ctrl", "syscon", "simple-mfd";
260 reset: reset-controller {
261 compatible = "oxsemi,ox820-reset", "oxsemi,ox810se-reset";
262 #reset-cells = <1>;
266 compatible = "oxsemi,ox820-stdclk", "oxsemi,ox810se-stdclk";
267 #clock-cells = <1>;
272 apb-bridge@47000000 {
273 #address-cells = <1>;
274 #size-cells = <1>;
275 compatible = "simple-bus";
279 compatible = "arm,arm11mp-scu";
283 local-timer@600 {
284 compatible = "arm,arm11mp-twd-timer";
290 gic: interrupt-controller@1000 {
291 compatible = "arm,arm11mp-gic";
292 interrupt-controller;
293 #interrupt-cells = <3>;