Lines Matching +full:serial +full:- +full:pins
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ox810se.dtsi - Device tree file for Oxford Semiconductor OX810SE SoC
8 #include <dt-bindings/clock/oxsemi,ox810se.h>
9 #include <dt-bindings/reset/oxsemi,ox810se.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
17 #address-cells = <0>;
18 #size-cells = <0>;
22 compatible = "arm,arm926ej-s";
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
37 clock-frequency = <25000000>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <125000000>;
47 compatible = "fixed-factor-clock";
48 #clock-cells = <0>;
49 clock-div = <1>;
50 clock-mult = <1>;
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <733333333>;
61 compatible = "fixed-factor-clock";
62 #clock-cells = <0>;
63 clock-div = <4>;
64 clock-mult = <1>;
69 compatible = "fixed-factor-clock";
70 #clock-cells = <0>;
71 clock-div = <2>;
72 clock-mult = <1>;
78 #address-cells = <1>;
79 #size-cells = <1>;
80 compatible = "simple-bus";
82 interrupt-parent = <&intc>;
85 compatible = "oxsemi,ox810se-dwmac", "snps,dwmac";
88 interrupt-names = "macirq";
89 mac-address = [000000000000]; /* Filled in by U-Boot */
90 phy-mode = "rgmii";
93 clock-names = "gmac", "stmmaceth";
97 oxsemi,sys-ctrl = <&sys>;
102 apb-bridge@44000000 {
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "simple-bus";
109 compatible = "oxsemi,ox810se-pinctrl";
112 oxsemi,sys-ctrl = <&sys>;
116 pins = "gpio31";
120 pins = "gpio32";
127 pins = "gpio27";
131 pins = "gpio28";
135 pins = "gpio29";
139 pins = "gpio30";
143 pins = "gpio33";
147 pins = "gpio34";
154 pins = "gpio20";
158 pins = "gpio22";
165 pins = "gpio8";
169 pins = "gpio9";
173 pins = "gpio23";
177 pins = "gpio24";
181 pins = "gpio25";
185 pins = "gpio26";
192 pins = "gpio6";
196 pins = "gpio7";
203 pins = "gpio0";
207 pins = "gpio1";
211 pins = "gpio2";
215 pins = "gpio3";
219 pins = "gpio4";
223 pins = "gpio5";
230 compatible = "oxsemi,ox810se-gpio";
233 #gpio-cells = <2>;
234 gpio-controller;
235 interrupt-controller;
236 #interrupt-cells = <2>;
238 oxsemi,gpio-bank = <0>;
239 gpio-ranges = <&pinctrl 0 0 32>;
243 compatible = "oxsemi,ox810se-gpio";
246 #gpio-cells = <2>;
247 gpio-controller;
248 interrupt-controller;
249 #interrupt-cells = <2>;
251 oxsemi,gpio-bank = <1>;
252 gpio-ranges = <&pinctrl 0 32 3>;
255 uart0: serial@200000 {
260 reg-shift = <0>;
261 fifo-size = <16>;
262 reg-io-width = <1>;
263 current-speed = <115200>;
264 no-loopback-test;
269 uart1: serial@300000 {
274 reg-shift = <0>;
275 fifo-size = <16>;
276 reg-io-width = <1>;
277 current-speed = <115200>;
278 no-loopback-test;
283 uart2: serial@900000 {
288 reg-shift = <0>;
289 fifo-size = <16>;
290 reg-io-width = <1>;
291 current-speed = <115200>;
292 no-loopback-test;
297 uart3: serial@a00000 {
302 reg-shift = <0>;
303 fifo-size = <16>;
304 reg-io-width = <1>;
305 current-speed = <115200>;
306 no-loopback-test;
312 apb-bridge@45000000 {
313 #address-cells = <1>;
314 #size-cells = <1>;
315 compatible = "simple-bus";
318 sys: sys-ctrl@0 {
319 compatible = "oxsemi,ox810se-sys-ctrl", "syscon", "simple-mfd";
322 reset: reset-controller {
323 compatible = "oxsemi,ox810se-reset";
324 #reset-cells = <1>;
328 compatible = "oxsemi,ox810se-stdclk";
329 #clock-cells = <1>;
334 #address-cells = <1>;
335 #size-cells = <1>;
336 compatible = "simple-bus";
339 intc: interrupt-controller@0 {
340 compatible = "oxsemi,ox810se-rps-irq";
341 interrupt-controller;
343 #interrupt-cells = <1>;
344 valid-mask = <0xffffffff>;
345 clear-mask = <0xffffffff>;
349 compatible = "oxsemi,ox810se-rps-timer";