Lines Matching +full:0 +full:x00030066
17 reg = <0x80000000 0x40000000>; /* 1 GB */
28 pinctrl-0 = <&enet_enable_gpio>;
97 pwms = <&twl_pwm 0 7812500>;
103 pwms = <&twl_pwmled 0 7812500>;
112 0 10 20 30 40
157 pinctrl-0 = <&wl12xx_gpio>;
176 #size-cells = <0>;
178 port@0 {
179 reg = <0>;
212 pinctrl-0 = <
219 OMAP4_IOPAD(0x118, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */
220 OMAP4_IOPAD(0x11a, PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */
221 OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */
222 OMAP4_IOPAD(0x11e, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
228 OMAP4_IOPAD(0x140, PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
229 OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
230 OMAP4_IOPAD(0x144, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
231 OMAP4_IOPAD(0x146, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
237 OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */
238 OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */
244 OMAP4_IOPAD(0x120, PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
245 OMAP4_IOPAD(0x1a0, PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */
251 OMAP4_IOPAD(0x110, PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */
252 OMAP4_IOPAD(0x112, PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */
253 OMAP4_IOPAD(0x114, PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */
254 OMAP4_IOPAD(0x116, PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */
260 OMAP4_IOPAD(0x0fe, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */
261 OMAP4_IOPAD(0x100, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */
262 OMAP4_IOPAD(0x102, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */
263 OMAP4_IOPAD(0x104, PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */
269 OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */
270 OMAP4_IOPAD(0x0f8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */
271 OMAP4_IOPAD(0x0fa, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */
272 OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */
278 OMAP4_IOPAD(0x132, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
279 OMAP4_IOPAD(0x134, PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
280 OMAP4_IOPAD(0x136, PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
281 OMAP4_IOPAD(0x138, PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
287 OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
288 OMAP4_IOPAD(0x09c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */
289 OMAP4_IOPAD(0x09e, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */
295 OMAP4_IOPAD(0x062, PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */
296 OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */
297 OMAP4_IOPAD(0x098, PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */
303 OMAP4_IOPAD(0x122, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
304 OMAP4_IOPAD(0x124, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
310 OMAP4_IOPAD(0x126, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
311 OMAP4_IOPAD(0x128, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
317 OMAP4_IOPAD(0x12a, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
318 OMAP4_IOPAD(0x12c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
324 OMAP4_IOPAD(0x12e, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */
325 OMAP4_IOPAD(0x130, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
332 OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3) /* gpmc_nwp.gpio_54 */
339 OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3) /* gpmc_ncs3.gpio_53 */
340 OMAP4_IOPAD(0x148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_clk.sdmmc5_clk */
341 OMAP4_IOPAD(0x14a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_cmd.sdmmc5_cmd */
342 OMAP4_IOPAD(0x14c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat0.sdmmc5_dat0 */
343 OMAP4_IOPAD(0x14e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat1.sdmmc5_dat1 */
344 OMAP4_IOPAD(0x150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat2.sdmmc5_dat2 */
345 OMAP4_IOPAD(0x152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc5_dat3.sdmmc5_dat3 */
352 OMAP4_IOPAD(0x070, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* gpmc_a24.gpio_48 */
359 OMAP4_IOPAD(0x054, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad10.gpio_34 */
368 OMAP4_IOPAD(0x13a, PIN_OUTPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.gpio_138 */
375 pinctrl-0 = <&i2c1_pins>;
380 reg = <0x48>;
381 /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */
387 #clock-cells = <0>;
388 reg = <0x4b>;
391 pinctrl-0 = <&twl6040_pins>;
393 /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */
420 pinctrl-0 = <&i2c2_pins>;
427 pinctrl-0 = <&i2c3_pins>;
437 reg = <0x48>;
446 reg = <0x29>;
452 pinctrl-0 = <&i2c4_pins>;
462 reg = <0x1e>;
468 pinctrl-0 = <&mcspi1_pins>;
470 eth@0 {
472 pinctrl-0 = <&ks8851_pins>;
476 reg = <0>;
505 pinctrl-0 = <&wl12xx_pins>;
512 #size-cells = <0>;
536 linux,keymap = <0x00000012 /* KEY_E */
537 0x00010013 /* KEY_R */
538 0x00020014 /* KEY_T */
539 0x00030066 /* KEY_HOME */
540 0x0004003f /* KEY_F5 */
541 0x000500f0 /* KEY_UNKNOWN */
542 0x00060017 /* KEY_I */
543 0x0007002a /* KEY_LEFTSHIFT */
544 0x01000020 /* KEY_D*/
545 0x01010021 /* KEY_F */
546 0x01020022 /* KEY_G */
547 0x010300e7 /* KEY_SEND */
548 0x01040040 /* KEY_F6 */
549 0x010500f0 /* KEY_UNKNOWN */
550 0x01060025 /* KEY_K */
551 0x0107001c /* KEY_ENTER */
552 0x0200002d /* KEY_X */
553 0x0201002e /* KEY_C */
554 0x0202002f /* KEY_V */
555 0x0203006b /* KEY_END */
556 0x02040041 /* KEY_F7 */
557 0x020500f0 /* KEY_UNKNOWN */
558 0x02060034 /* KEY_DOT */
559 0x0207003a /* KEY_CAPSLOCK */
560 0x0300002c /* KEY_Z */
561 0x0301004e /* KEY_KPLUS */
562 0x03020030 /* KEY_B */
563 0x0303003b /* KEY_F1 */
564 0x03040042 /* KEY_F8 */
565 0x030500f0 /* KEY_UNKNOWN */
566 0x03060018 /* KEY_O */
567 0x03070039 /* KEY_SPACE */
568 0x04000011 /* KEY_W */
569 0x04010015 /* KEY_Y */
570 0x04020016 /* KEY_U */
571 0x0403003c /* KEY_F2 */
572 0x04040073 /* KEY_VOLUMEUP */
573 0x040500f0 /* KEY_UNKNOWN */
574 0x04060026 /* KEY_L */
575 0x04070069 /* KEY_LEFT */
576 0x0500001f /* KEY_S */
577 0x05010023 /* KEY_H */
578 0x05020024 /* KEY_J */
579 0x0503003d /* KEY_F3 */
580 0x05040043 /* KEY_F9 */
581 0x05050072 /* KEY_VOLUMEDOWN */
582 0x05060032 /* KEY_M */
583 0x0507006a /* KEY_RIGHT */
584 0x06000010 /* KEY_Q */
585 0x0601001e /* KEY_A */
586 0x06020031 /* KEY_N */
587 0x0603009e /* KEY_BACK */
588 0x0604000e /* KEY_BACKSPACE */
589 0x060500f0 /* KEY_UNKNOWN */
590 0x06060019 /* KEY_P */
591 0x06070067 /* KEY_UP */
592 0x07000094 /* KEY_PROG1 */
593 0x07010095 /* KEY_PROG2 */
594 0x070200ca /* KEY_PROG3 */
595 0x070300cb /* KEY_PROG4 */
596 0x0704003e /* KEY_F4 */
597 0x070500f0 /* KEY_UNKNOWN */
598 0x07060160 /* KEY_OK */
599 0x0707006c>; /* KEY_DOWN */
607 pinctrl-0 = <&uart2_pins>;
614 pinctrl-0 = <&uart3_pins>;
621 pinctrl-0 = <&uart4_pins>;
626 pinctrl-0 = <&mcbsp1_pins>;
632 pinctrl-0 = <&mcbsp2_pins>;
638 pinctrl-0 = <&dmic_pins>;
663 lanes = <0 1 2 3 4 5>;
667 lcd0: panel@0 {
669 reg = <0>;
689 lanes = <0 1 2 3 4 5>;
693 lcd1: panel@0 {
695 reg = <0>;