Lines Matching +full:opp +full:- +full:supported +full:- +full:hw
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
21 operating-points-v2 = <&cpu0_opp_table>;
23 vbb-supply = <&abb_mpu_iva>;
24 clock-latency = <300000>; /* From omap-cpufreq driver */
25 #cooling-cells = <2>;
29 cpu0_opp_table: opp-table {
30 compatible = "operating-points-v2-ti-cpu";
33 opp50-300000000 {
34 opp-hz = /bits/ 64 <300000000>;
37 * Table 4-19 of the DM3730 Data sheet (SPRS685B)
38 * Format is: cpu0-supply: <target min max>
39 * vbb-supply: <target min max>
41 opp-microvolt = <1012500 1012500 1012500>,
47 opp-supported-hw = <0xffffffff 3>;
48 opp-suspend;
51 opp100-600000000 {
52 opp-hz = /bits/ 64 <600000000>;
53 opp-microvolt = <1200000 1200000 1200000>,
55 opp-supported-hw = <0xffffffff 3>;
58 opp130-800000000 {
59 opp-hz = /bits/ 64 <800000000>;
60 opp-microvolt = <1325000 1325000 1325000>,
62 opp-supported-hw = <0xffffffff 3>;
65 opp1g-1000000000 {
66 opp-hz = /bits/ 64 <1000000000>;
67 opp-microvolt = <1375000 1375000 1375000>,
69 /* only on am/dm37x with speed-binned bit set */
70 opp-supported-hw = <0xffffffff 2>;
75 compatible = "ti,omap-opp-supply";
76 ti,absolute-max-voltage-uv = <1375000>;
81 compatible = "ti,omap3-uart";
85 dma-names = "tx", "rx";
87 clock-frequency = <48000000>;
90 abb_mpu_iva: regulator-abb-mpu {
91 compatible = "ti,abb-v1";
92 regulator-name = "abb_mpu_iva";
93 #address-cells = <0>;
94 #size-cells = <0>;
96 reg-names = "base-address", "int-address";
97 ti,tranxdone-status-mask = <0x4000000>;
99 ti,settling-time = <30>;
100 ti,clock-cycles = <8>;
111 compatible = "ti,omap3-padconf", "pinctrl-single";
113 #address-cells = <1>;
114 #size-cells = <0>;
115 #pinctrl-cells = <1>;
116 #interrupt-cells = <1>;
117 interrupt-controller;
118 pinctrl-single,register-width = <16>;
119 pinctrl-single,function-mask = <0xff1f>;
123 compatible = "ti,omap3-isp";
129 ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
130 #clock-cells = <1>;
132 #address-cells = <1>;
133 #size-cells = <0>;
139 compatible = "ti,omap36xx-bandgap";
140 #thermal-sensor-cells = <0>;
143 target-module@480cb000 {
144 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
147 reg-names = "sysc";
148 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
149 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
153 clock-names = "fck";
154 #address-cells = <1>;
155 #size-cells = <1>;
159 compatible = "ti,omap3-smartreflex-core";
165 target-module@480c9000 {
166 compatible = "ti,sysc-omap3630-sr", "ti,sysc";
169 reg-names = "sysc";
170 ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
171 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
175 clock-names = "fck";
176 #address-cells = <1>;
177 #size-cells = <1>;
182 compatible = "ti,omap3-smartreflex-mpu-iva";
190 * "ti,sysc-omap4" type register with just sidle and midle bits
191 * available while omap34xx has "ti,sysc-omap2" type sysconfig.
193 sgx_module: target-module@50000000 {
194 compatible = "ti,sysc-omap4", "ti,sysc";
197 reg-names = "rev", "sysc";
198 ti,sysc-midle = <SYSC_IDLE_FORCE>,
201 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
205 clock-names = "fck", "ick";
206 #address-cells = <1>;
207 #size-cells = <1>;
217 thermal_zones: thermal-zones {
218 #include "omap3-cpu-thermal.dtsi"
223 compatible = "ti,omap3630-sdma", "ti,omap-sdma";
229 clock-names = "fck", "tv_dac_clk";
238 clock-names = "ssi_ssr_fck",
243 /include/ "omap34xx-omap36xx-clocks.dtsi"
244 /include/ "omap36xx-omap3430es2plus-clocks.dtsi"
245 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
246 /include/ "omap36xx-clocks.dtsi"