Lines Matching +full:lpc +full:- +full:interrupts
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
19 clock-output-names = "refclk";
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <800000000>;
27 clock-output-names = "sysbypck";
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <800000000>;
35 clock-output-names = "mcbypck";
40 compatible = "fixed-clock";
41 #clock-cells = <0>;
42 clock-frequency = <125000000>;
43 clock-output-names = "clk_rg1refck";
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <125000000>;
51 clock-output-names = "clk_rg2refck";
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <50000000>;
58 clock-output-names = "clk_xin";
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "simple-bus";
65 interrupt-parent = <&gic>;
69 compatible = "arm,cortex-a9-scu";
73 l2: cache-controller@3fc000 {
74 compatible = "arm,pl310-cache";
76 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
77 cache-unified;
78 cache-level = <2>;
80 arm,shared-override;
83 gic: interrupt-controller@3ff000 {
84 compatible = "arm,cortex-a9-gic";
85 interrupt-controller;
86 #interrupt-cells = <3>;
92 compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
97 compatible = "nuvoton,npcm750-rst", "syscon", "simple-mfd";
103 #address-cells = <1>;
104 #size-cells = <1>;
105 compatible = "simple-bus";
106 interrupt-parent = <&gic>;
110 compatible = "nuvoton,npcm750-reset";
112 #reset-cells = <2>;
116 clk: clock-controller@f0801000 {
117 compatible = "nuvoton,npcm750-clk", "syscon";
118 #clock-cells = <1>;
119 clock-controller;
121 clock-names = "refclk", "sysbypck", "mcbypck";
129 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
130 interrupt-names = "macirq";
133 clock-names = "stmmaceth", "clk_gmac";
134 pinctrl-names = "default";
135 pinctrl-0 = <&rg1_pins
141 compatible = "nuvoton,npcm750-ehci";
143 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
148 compatible = "nuvoton,npcm750-fiu";
149 #address-cells = <1>;
150 #size-cells = <0>;
152 reg-names = "control", "memory";
154 clock-names = "clk_spi0";
159 compatible = "nuvoton,npcm750-fiu";
160 #address-cells = <1>;
161 #size-cells = <0>;
163 reg-names = "control", "memory";
165 clock-names = "clk_spi3";
166 pinctrl-names = "default";
167 pinctrl-0 = <&spi3_pins>;
172 compatible = "nuvoton,npcm750-fiu";
173 #address-cells = <1>;
174 #size-cells = <0>;
176 reg-names = "control", "memory";
178 clock-names = "clk_spix";
183 #address-cells = <1>;
184 #size-cells = <1>;
185 compatible = "simple-bus";
186 interrupt-parent = <&gic>;
190 compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
192 reg-io-width = <1>;
194 #address-cells = <1>;
195 #size-cells = <1>;
199 compatible = "nuvoton,npcm750-kcs-bmc";
201 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
207 compatible = "nuvoton,npcm750-kcs-bmc";
209 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
215 compatible = "nuvoton,npcm750-kcs-bmc";
217 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
224 compatible = "nuvoton,npcm750-pspi";
226 pinctrl-names = "default";
227 pinctrl-0 = <&pspi1_pins>;
228 #address-cells = <1>;
229 #size-cells = <0>;
230 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
232 clock-names = "clk_apb5";
238 compatible = "nuvoton,npcm750-pspi";
240 pinctrl-names = "default";
241 pinctrl-0 = <&pspi2_pins>;
242 #address-cells = <1>;
243 #size-cells = <0>;
244 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
246 clock-names = "clk_apb5";
252 compatible = "nuvoton,npcm750-timer";
253 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
259 compatible = "nuvoton,npcm750-wdt";
260 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
267 compatible = "nuvoton,npcm750-wdt";
268 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
275 compatible = "nuvoton,npcm750-wdt";
276 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
283 compatible = "nuvoton,npcm750-uart";
286 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
287 reg-shift = <2>;
292 compatible = "nuvoton,npcm750-uart";
295 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
296 reg-shift = <2>;
301 compatible = "nuvoton,npcm750-uart";
304 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
305 reg-shift = <2>;
310 compatible = "nuvoton,npcm750-uart";
313 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
314 reg-shift = <2>;
319 compatible = "nuvoton,npcm750-rng";
325 compatible = "nuvoton,npcm750-adc";
327 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
333 pwm_fan: pwm-fan-controller@103000 {
334 #address-cells = <1>;
335 #size-cells = <0>;
336 compatible = "nuvoton,npcm750-pwm-fan";
338 reg-names = "pwm", "fan";
341 clock-names = "pwm","fan";
342 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
350 pinctrl-names = "default";
351 pinctrl-0 = <&pwm0_pins &pwm1_pins
368 compatible = "nuvoton,npcm750-i2c";
369 #address-cells = <1>;
370 #size-cells = <0>;
372 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
373 pinctrl-names = "default";
374 pinctrl-0 = <&smb0_pins>;
380 compatible = "nuvoton,npcm750-i2c";
381 #address-cells = <1>;
382 #size-cells = <0>;
384 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&smb1_pins>;
392 compatible = "nuvoton,npcm750-i2c";
393 #address-cells = <1>;
394 #size-cells = <0>;
396 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
397 pinctrl-names = "default";
398 pinctrl-0 = <&smb2_pins>;
404 compatible = "nuvoton,npcm750-i2c";
405 #address-cells = <1>;
406 #size-cells = <0>;
408 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&smb3_pins>;
416 compatible = "nuvoton,npcm750-i2c";
417 #address-cells = <1>;
418 #size-cells = <0>;
420 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
421 pinctrl-names = "default";
422 pinctrl-0 = <&smb4_pins>;
428 compatible = "nuvoton,npcm750-i2c";
429 #address-cells = <1>;
430 #size-cells = <0>;
432 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
433 pinctrl-names = "default";
434 pinctrl-0 = <&smb5_pins>;
440 compatible = "nuvoton,npcm750-i2c";
441 #address-cells = <1>;
442 #size-cells = <0>;
444 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&smb6_pins>;
452 compatible = "nuvoton,npcm750-i2c";
453 #address-cells = <1>;
454 #size-cells = <0>;
456 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
457 pinctrl-names = "default";
458 pinctrl-0 = <&smb7_pins>;
464 compatible = "nuvoton,npcm750-i2c";
465 #address-cells = <1>;
466 #size-cells = <0>;
468 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&smb8_pins>;
476 compatible = "nuvoton,npcm750-i2c";
477 #address-cells = <1>;
478 #size-cells = <0>;
480 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
481 pinctrl-names = "default";
482 pinctrl-0 = <&smb9_pins>;
488 compatible = "nuvoton,npcm750-i2c";
489 #address-cells = <1>;
490 #size-cells = <0>;
492 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&smb10_pins>;
500 compatible = "nuvoton,npcm750-i2c";
501 #address-cells = <1>;
502 #size-cells = <0>;
504 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&smb11_pins>;
512 compatible = "nuvoton,npcm750-i2c";
513 #address-cells = <1>;
514 #size-cells = <0>;
516 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&smb12_pins>;
524 compatible = "nuvoton,npcm750-i2c";
525 #address-cells = <1>;
526 #size-cells = <0>;
528 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
529 pinctrl-names = "default";
530 pinctrl-0 = <&smb13_pins>;
536 compatible = "nuvoton,npcm750-i2c";
537 #address-cells = <1>;
538 #size-cells = <0>;
540 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
541 pinctrl-names = "default";
542 pinctrl-0 = <&smb14_pins>;
548 compatible = "nuvoton,npcm750-i2c";
549 #address-cells = <1>;
550 #size-cells = <0>;
552 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
553 pinctrl-names = "default";
554 pinctrl-0 = <&smb15_pins>;
561 #address-cells = <1>;
562 #size-cells = <1>;
563 compatible = "nuvoton,npcm750-pinctrl", "syscon", "simple-mfd";
566 gpio-controller;
567 #gpio-cells = <2>;
569 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
570 gpio-ranges = <&pinctrl 0 0 32>;
573 gpio-controller;
574 #gpio-cells = <2>;
576 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
577 gpio-ranges = <&pinctrl 0 32 32>;
580 gpio-controller;
581 #gpio-cells = <2>;
583 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
584 gpio-ranges = <&pinctrl 0 64 32>;
587 gpio-controller;
588 #gpio-cells = <2>;
590 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
591 gpio-ranges = <&pinctrl 0 96 32>;
594 gpio-controller;
595 #gpio-cells = <2>;
597 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
598 gpio-ranges = <&pinctrl 0 128 32>;
601 gpio-controller;
602 #gpio-cells = <2>;
604 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
605 gpio-ranges = <&pinctrl 0 160 32>;
608 gpio-controller;
609 #gpio-cells = <2>;
611 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
612 gpio-ranges = <&pinctrl 0 192 32>;
615 gpio-controller;
616 #gpio-cells = <2>;
618 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
619 gpio-ranges = <&pinctrl 0 224 32>;
622 iox1_pins: iox1-pins {
626 iox2_pins: iox2-pins {
630 smb1d_pins: smb1d-pins {
634 smb2d_pins: smb2d-pins {
638 lkgpo1_pins: lkgpo1-pins {
642 lkgpo2_pins: lkgpo2-pins {
646 ioxh_pins: ioxh-pins {
650 gspi_pins: gspi-pins {
654 smb5b_pins: smb5b-pins {
658 smb5c_pins: smb5c-pins {
662 lkgpo0_pins: lkgpo0-pins {
666 pspi2_pins: pspi2-pins {
670 smb4den_pins: smb4den-pins {
674 smb4b_pins: smb4b-pins {
678 smb4c_pins: smb4c-pins {
682 smb15_pins: smb15-pins {
686 smb4d_pins: smb4d-pins {
690 smb14_pins: smb14-pins {
694 smb5_pins: smb5-pins {
698 smb4_pins: smb4-pins {
702 smb3_pins: smb3-pins {
706 spi0cs1_pins: spi0cs1-pins {
710 spi0cs2_pins: spi0cs2-pins {
714 spi0cs3_pins: spi0cs3-pins {
718 smb3c_pins: smb3c-pins {
722 smb3b_pins: smb3b-pins {
726 bmcuart0a_pins: bmcuart0a-pins {
730 uart1_pins: uart1-pins {
734 jtag2_pins: jtag2-pins {
738 bmcuart1_pins: bmcuart1-pins {
742 uart2_pins: uart2-pins {
746 bmcuart0b_pins: bmcuart0b-pins {
750 r1err_pins: r1err-pins {
754 r1md_pins: r1md-pins {
758 smb3d_pins: smb3d-pins {
762 fanin0_pins: fanin0-pins {
766 fanin1_pins: fanin1-pins {
770 fanin2_pins: fanin2-pins {
774 fanin3_pins: fanin3-pins {
778 fanin4_pins: fanin4-pins {
782 fanin5_pins: fanin5-pins {
786 fanin6_pins: fanin6-pins {
790 fanin7_pins: fanin7-pins {
794 fanin8_pins: fanin8-pins {
798 fanin9_pins: fanin9-pins {
802 fanin10_pins: fanin10-pins {
806 fanin11_pins: fanin11-pins {
810 fanin12_pins: fanin12-pins {
814 fanin13_pins: fanin13-pins {
818 fanin14_pins: fanin14-pins {
822 fanin15_pins: fanin15-pins {
826 pwm0_pins: pwm0-pins {
830 pwm1_pins: pwm1-pins {
834 pwm2_pins: pwm2-pins {
838 pwm3_pins: pwm3-pins {
842 r2_pins: r2-pins {
846 r2err_pins: r2err-pins {
850 r2md_pins: r2md-pins {
854 ga20kbc_pins: ga20kbc-pins {
858 smb5d_pins: smb5d-pins {
862 lpc_pins: lpc-pins {
863 groups = "lpc";
864 function = "lpc";
866 espi_pins: espi-pins {
870 rg1_pins: rg1-pins {
874 rg1mdio_pins: rg1mdio-pins {
878 rg2_pins: rg2-pins {
882 ddr_pins: ddr-pins {
886 smb0_pins: smb0-pins {
890 smb1_pins: smb1-pins {
894 smb2_pins: smb2-pins {
898 smb2c_pins: smb2c-pins {
902 smb2b_pins: smb2b-pins {
906 smb1c_pins: smb1c-pins {
910 smb1b_pins: smb1b-pins {
914 smb8_pins: smb8-pins {
918 smb9_pins: smb9-pins {
922 smb10_pins: smb10-pins {
926 smb11_pins: smb11-pins {
930 sd1_pins: sd1-pins {
934 sd1pwr_pins: sd1pwr-pins {
938 pwm4_pins: pwm4-pins {
942 pwm5_pins: pwm5-pins {
946 pwm6_pins: pwm6-pins {
950 pwm7_pins: pwm7-pins {
954 mmc8_pins: mmc8-pins {
958 mmc_pins: mmc-pins {
962 mmcwp_pins: mmcwp-pins {
966 mmccd_pins: mmccd-pins {
970 mmcrst_pins: mmcrst-pins {
974 clkout_pins: clkout-pins {
978 serirq_pins: serirq-pins {
982 lpcclk_pins: lpcclk-pins {
986 scipme_pins: scipme-pins {
990 sci_pins: sci-pins {
994 smb6_pins: smb6-pins {
998 smb7_pins: smb7-pins {
1002 pspi1_pins: pspi1-pins {
1006 faninx_pins: faninx-pins {
1010 r1_pins: r1-pins {
1014 spi3_pins: spi3-pins {
1018 spi3cs1_pins: spi3cs1-pins {
1022 spi3quad_pins: spi3quad-pins {
1026 spi3cs2_pins: spi3cs2-pins {
1030 spi3cs3_pins: spi3cs3-pins {
1034 nprd_smi_pins: nprd-smi-pins {
1038 smb0b_pins: smb0b-pins {
1042 smb0c_pins: smb0c-pins {
1046 smb0den_pins: smb0den-pins {
1050 smb0d_pins: smb0d-pins {
1054 ddc_pins: ddc-pins {
1058 rg2mdio_pins: rg2mdio-pins {
1062 wdog1_pins: wdog1-pins {
1066 wdog2_pins: wdog2-pins {
1070 smb12_pins: smb12-pins {
1074 smb13_pins: smb13-pins {
1078 spix_pins: spix-pins {
1082 spixcs1_pins: spixcs1-pins {
1086 clkreq_pins: clkreq-pins {
1090 hgpio0_pins: hgpio0-pins {
1094 hgpio1_pins: hgpio1-pins {
1098 hgpio2_pins: hgpio2-pins {
1102 hgpio3_pins: hgpio3-pins {
1106 hgpio4_pins: hgpio4-pins {
1110 hgpio5_pins: hgpio5-pins {
1114 hgpio6_pins: hgpio6-pins {
1118 hgpio7_pins: hgpio7-pins {