Lines Matching refs:pericfg
243 pericfg: syscon@10003000 { label
244 compatible = "mediatek,mt7623-pericfg",
245 "mediatek,mt2701-pericfg",
371 clocks = <&pericfg CLK_PERI_AUXADC>;
381 clocks = <&pericfg CLK_PERI_UART0_SEL>,
382 <&pericfg CLK_PERI_UART0>;
392 clocks = <&pericfg CLK_PERI_UART1_SEL>,
393 <&pericfg CLK_PERI_UART1>;
403 clocks = <&pericfg CLK_PERI_UART2_SEL>,
404 <&pericfg CLK_PERI_UART2>;
414 clocks = <&pericfg CLK_PERI_UART3_SEL>,
415 <&pericfg CLK_PERI_UART3>;
425 <&pericfg CLK_PERI_PWM>,
426 <&pericfg CLK_PERI_PWM1>,
427 <&pericfg CLK_PERI_PWM2>,
428 <&pericfg CLK_PERI_PWM3>,
429 <&pericfg CLK_PERI_PWM4>,
430 <&pericfg CLK_PERI_PWM5>;
443 clocks = <&pericfg CLK_PERI_I2C0>,
444 <&pericfg CLK_PERI_AP_DMA>;
458 clocks = <&pericfg CLK_PERI_I2C1>,
459 <&pericfg CLK_PERI_AP_DMA>;
473 clocks = <&pericfg CLK_PERI_I2C2>,
474 <&pericfg CLK_PERI_AP_DMA>;
490 <&pericfg CLK_PERI_SPI0>;
501 clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
503 resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
516 clocks = <&pericfg CLK_PERI_BTIF>;
529 clocks = <&pericfg CLK_PERI_NFI>,
530 <&pericfg CLK_PERI_NFI_PAD>;
543 clocks = <&pericfg CLK_PERI_NFI_ECC>;
552 clocks = <&pericfg CLK_PERI_FLASH>,
569 <&pericfg CLK_PERI_SPI1>;
583 <&pericfg CLK_PERI_SPI2>;
596 clocks = <&pericfg CLK_PERI_USB0>,
597 <&pericfg CLK_PERI_USB0_MCU>,
598 <&pericfg CLK_PERI_USB_SLV>;
721 clocks = <&pericfg CLK_PERI_MSDC30_0>,
732 clocks = <&pericfg CLK_PERI_MSDC30_1>,