Lines Matching +full:lan966x +full:- +full:serdes
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/dma/at91.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/clock/microchip,lan966x.h>
21 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
31 compatible = "arm,cortex-a7";
32 clock-frequency = <600000000>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <165625000>;
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <600000000>;
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <300000000>;
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <200000000>;
63 clks: clock-controller@e00c00a8 {
64 compatible = "microchip,lan966x-gck";
65 #clock-cells = <1>;
67 clock-names = "cpu", "ddr", "sys";
72 compatible = "arm,armv7-timer";
73 interrupt-parent = <&gic>;
78 clock-frequency = <37500000>;
82 compatible = "simple-bus";
83 #address-cells = <1>;
84 #size-cells = <1>;
88 compatible = "microchip,lan9662-udc",
89 "atmel,sama5d3-udc";
94 clock-names = "pclk", "hclk";
99 compatible = "microchip,lan966x-switch";
102 reg-names = "cpu", "gcb";
108 interrupt-names = "xtr", "fdma", "ana", "ptp",
109 "ptp-ext";
111 reset-names = "switch";
114 ethernet-ports {
115 #address-cells = <1>;
116 #size-cells = <0>;
161 compatible = "atmel,sama5d2-flexcom";
164 #address-cells = <1>;
165 #size-cells = <1>;
170 compatible = "atmel,at91sam9260-usart";
175 dma-names = "tx", "rx";
177 clock-names = "usart";
178 atmel,fifo-size = <32>;
183 compatible = "atmel,at91rm9200-spi";
188 dma-names = "tx", "rx";
190 clock-names = "spi_clk";
191 atmel,fifo-size = <32>;
192 #address-cells = <1>;
193 #size-cells = <0>;
198 compatible = "microchip,sam9x60-i2c";
203 dma-names = "tx", "rx";
205 #address-cells = <1>;
206 #size-cells = <0>;
212 compatible = "atmel,sama5d2-flexcom";
215 #address-cells = <1>;
216 #size-cells = <1>;
221 compatible = "atmel,at91sam9260-usart";
226 dma-names = "tx", "rx";
228 clock-names = "usart";
229 atmel,fifo-size = <32>;
234 compatible = "atmel,at91rm9200-spi";
239 dma-names = "tx", "rx";
241 clock-names = "spi_clk";
242 atmel,fifo-size = <32>;
243 #address-cells = <1>;
244 #size-cells = <0>;
249 compatible = "microchip,sam9x60-i2c";
254 dma-names = "tx", "rx";
256 #address-cells = <1>;
257 #size-cells = <0>;
263 compatible = "atmel,at91sam9g45-trng";
269 compatible = "atmel,at91sam9g46-aes";
274 dma-names = "tx", "rx";
276 clock-names = "aes_clk";
280 compatible = "atmel,sama5d2-flexcom";
283 #address-cells = <1>;
284 #size-cells = <1>;
289 compatible = "atmel,at91sam9260-usart";
294 dma-names = "tx", "rx";
296 clock-names = "usart";
297 atmel,fifo-size = <32>;
302 compatible = "atmel,at91rm9200-spi";
307 dma-names = "tx", "rx";
309 clock-names = "spi_clk";
310 atmel,fifo-size = <32>;
311 #address-cells = <1>;
312 #size-cells = <0>;
317 compatible = "microchip,sam9x60-i2c";
322 dma-names = "tx", "rx";
324 #address-cells = <1>;
325 #size-cells = <0>;
331 compatible = "atmel,sama5d2-flexcom";
334 #address-cells = <1>;
335 #size-cells = <1>;
340 compatible = "atmel,at91sam9260-usart";
345 dma-names = "tx", "rx";
347 clock-names = "usart";
348 atmel,fifo-size = <32>;
353 compatible = "atmel,at91rm9200-spi";
358 dma-names = "tx", "rx";
360 clock-names = "spi_clk";
361 atmel,fifo-size = <32>;
362 #address-cells = <1>;
363 #size-cells = <0>;
368 compatible = "microchip,sam9x60-i2c";
373 dma-names = "tx", "rx";
375 #address-cells = <1>;
376 #size-cells = <0>;
381 dma0: dma-controller@e0068000 {
382 compatible = "microchip,sama7g5-dma";
385 #dma-cells = <1>;
387 clock-names = "dma_clk";
391 compatible = "atmel,at91sam9g46-sha";
395 dma-names = "tx";
397 clock-names = "sha_clk";
401 compatible = "atmel,sama5d2-flexcom";
404 #address-cells = <1>;
405 #size-cells = <1>;
410 compatible = "atmel,at91sam9260-usart";
415 dma-names = "tx", "rx";
417 clock-names = "usart";
418 atmel,fifo-size = <32>;
423 compatible = "atmel,at91rm9200-spi";
428 dma-names = "tx", "rx";
430 clock-names = "spi_clk";
431 atmel,fifo-size = <32>;
432 #address-cells = <1>;
433 #size-cells = <0>;
438 compatible = "microchip,sam9x60-i2c";
443 dma-names = "tx", "rx";
445 #address-cells = <1>;
446 #size-cells = <0>;
452 compatible = "snps,dw-apb-timer";
455 clock-names = "timer";
460 compatible = "snps,dw-wdt";
468 compatible = "microchip,lan966x-cpu-syscon", "syscon";
475 reg-names = "m_can", "message_ram";
478 interrupt-names = "int0", "int1";
480 clock-names = "hclk", "cclk";
481 assigned-clocks = <&clks GCK_ID_MCAN0>;
482 assigned-clock-rates = <40000000>;
483 bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
490 reg-names = "m_can", "message_ram";
493 interrupt-names = "int0", "int1";
495 clock-names = "hclk", "cclk";
496 assigned-clocks = <&clks GCK_ID_MCAN1>;
497 assigned-clock-rates = <40000000>;
498 bosch,mram-cfg = <0x4000 0 0 64 0 0 32 32>;
502 reset: reset-controller@e200400c {
503 compatible = "microchip,lan966x-switch-reset";
505 reg-names = "gcb";
506 #reset-cells = <1>;
507 cpu-syscon = <&cpu_ctrl>;
511 compatible = "microchip,lan966x-pinctrl";
515 reset-names = "switch";
516 gpio-controller;
517 #gpio-cells = <2>;
518 gpio-ranges = <&gpio 0 0 78>;
519 interrupt-controller;
521 #interrupt-cells = <2>;
525 compatible = "microchip,lan966x-miim";
526 #address-cells = <1>;
527 #size-cells = <0>;
534 compatible = "microchip,lan966x-miim";
535 #address-cells = <1>;
536 #size-cells = <0>;
542 phy0: ethernet-phy@1 {
548 phy1: ethernet-phy@2 {
556 compatible = "microchip,sparx5-sgpio";
560 reset-names = "switch";
561 #address-cells = <1>;
562 #size-cells = <0>;
566 compatible = "microchip,sparx5-sgpio-bank";
568 gpio-controller;
569 #gpio-cells = <3>;
571 interrupt-controller;
572 #interrupt-cells = <3>;
576 compatible = "microchip,sparx5-sgpio-bank";
578 gpio-controller;
579 #gpio-cells = <3>;
584 compatible = "microchip,lan9668-hwmon";
587 reg-names = "pvt", "fan";
591 serdes: serdes@e202c000 { label
592 compatible = "microchip,lan966x-serdes";
595 #phy-cells = <2>;
599 gic: interrupt-controller@e8c11000 {
600 compatible = "arm,gic-400", "arm,cortex-a7-gic";
601 #interrupt-cells = <3>;
603 interrupt-controller;