Lines Matching +full:vco +full:- +full:offset
1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 compatible = "arm,integrator-ap";
16 #address-cells = <1>;
17 #size-cells = <0>;
27 /* compatible = "arm,arm926ej-s"; */
30 * The documentation in ARM DUI 0138E page 3-12 states
32 * but painful trial-and-error has proved to me that it
37 operating-points = <71000 0
45 clock-names = "cpu";
46 clock-latency = <1000000>; /* 1 ms */
51 arm,timer-primary = &timer2;
52 arm,timer-secondary = &timer1;
61 #clock-cells = <0>;
62 compatible = "fixed-clock";
63 clock-frequency = <24000000>;
67 #clock-cells = <0>;
68 compatible = "fixed-factor-clock";
69 clock-div = <1>;
70 clock-mult = <1>;
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <14745600>;
82 core-module@10000000 {
85 #clock-cells = <0>;
86 compatible = "fixed-clock";
87 clock-frequency = <24000000>;
91 cmosc: clock-controller@8 {
92 compatible = "arm,syscon-icst525-integratorap-cm";
94 #clock-cells = <0>;
95 lock-offset = <0x14>;
96 vco-offset = <0x08>;
101 auxosc: clock-controller@1c {
102 compatible = "arm,syscon-icst525";
104 #clock-cells = <0>;
105 lock-offset = <0x14>;
106 vco-offset = <0x1c>;
112 compatible = "arm,integrator-ap-syscon", "syscon";
115 #size-cells = <1>;
116 #address-cells = <1>;
122 sysclk: clock-controller@4 {
123 compatible = "arm,syscon-icst525-integratorap-sys";
125 #clock-cells = <0>;
126 lock-offset = <0x1c>;
127 vco-offset = <0x04>;
131 /* One-bit control for the PCI bus clock (33 or 25 MHz) */
132 pciclk: clock-controller@4,8 {
133 compatible = "arm,syscon-icst525-integratorap-pci";
135 #clock-cells = <0>;
136 lock-offset = <0x1c>;
137 vco-offset = <0x04>;
143 compatible = "arm,integrator-timer";
148 compatible = "arm,integrator-timer";
153 compatible = "arm,integrator-timer";
158 valid-mask = <0x003fffff>;
162 compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
164 #interrupt-cells = <1>;
165 #size-cells = <2>;
166 #address-cells = <3>;
169 interrupt-parent = <&pic>;
172 bus-range = <0x00 0xff>;
175 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
179 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
183 interrupt-map-mask = <0xf800 0 0 0x7>;
184 interrupt-map = <
216 arm,primecell-periphid = <0x00041030>;
218 clock-names = "apb_pclk";
223 arm,primecell-periphid = <0x00041010>;
225 clock-names = "uartclk", "apb_pclk";
230 arm,primecell-periphid = <0x00041010>;
232 clock-names = "uartclk", "apb_pclk";
237 arm,primecell-periphid = <0x00041050>;
239 clock-names = "KMIREFCLK", "apb_pclk";
244 arm,primecell-periphid = <0x00041050>;
246 clock-names = "KMIREFCLK", "apb_pclk";
256 compatible = "arm,integrator-ap-lm";
257 #address-cells = <1>;
258 #size-cells = <1>;
260 dma-ranges;
263 compatible = "simple-bus";
265 dma-ranges = <0x00000000 0xc0000000 0x10000000>;
267 #address-cells = <1>;
268 #size-cells = <1>;
271 compatible = "simple-bus";
273 dma-ranges = <0x00000000 0xd0000000 0x10000000>;
275 #address-cells = <1>;
276 #size-cells = <1>;
279 compatible = "simple-bus";
281 dma-ranges = <0x00000000 0xe0000000 0x10000000>;
283 #address-cells = <1>;
284 #size-cells = <1>;
287 compatible = "simple-bus";
289 dma-ranges = <0x00000000 0xf0000000 0x10000000>;
291 #address-cells = <1>;
292 #size-cells = <1>;