Lines Matching +full:0 +full:x00000bff
21 reg = <0xc2000000 0x00100000>;
28 syscon@0 {
30 reg = <0x00000000 0x1000>;
35 vco1: clock-controller@0 {
37 reg = <0x00 0x04>;
38 #clock-cells = <0>;
39 lock-offset = <0x08>;
40 vco-offset = <0x00>;
47 reg = <0x04 0x04>;
48 #clock-cells = <0>;
49 lock-offset = <0x08>;
50 vco-offset = <0x04>;
59 #clock-cells = <0>;
69 #clock-cells = <0>;
89 #size-cells = <0>;
91 button@0 {
95 gpios = <&impd1_gpio1 0 GPIO_ACTIVE_HIGH>;
133 #size-cells = <0>;
137 #size-cells = <0>;
138 port@0 {
139 reg = <0>;
167 reg = <0x00100000 0x1000>;
175 reg = <0x00200000 0x1000>;
183 reg = <0x00300000 0x1000>;
191 reg = <0x00400000 0x1000>;
203 reg = <0x00500000 0x1000>;
215 reg = <0x00600000 0x1000>;
223 reg = <0x00700000 0x1000>;
237 reg = <0x00800000 0x1000>;
245 reg = <0x01000000 0x1000>;
254 port@0 {
256 #size-cells = <0>;
258 clcd_pads_vga_dac: endpoint@0 {
259 reg = <0>;
261 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
270 reg = <0x03000000 0x1000>;
271 /* Valid interrupts, 0-9 and 11 */
272 valid-mask = <0x00000bff>;
273 /* LM site 0 has IRQ 9 on the PIC */