Lines Matching +full:anatop +full:- +full:delay +full:- +full:reg +full:- +full:offset
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
58 idle-states {
59 entry-method = "psci";
61 cpu_sleep_wait: cpu-sleep-wait {
62 compatible = "arm,idle-state";
63 arm,psci-suspend-param = <0x0010000>;
64 local-timer-stop;
65 entry-latency-us = <100>;
66 exit-latency-us = <50>;
67 min-residency-us = <1000>;
72 compatible = "arm,cortex-a7";
74 reg = <0>;
75 clock-frequency = <792000000>;
76 clock-latency = <61036>; /* two CLK32 periods */
78 cpu-idle-states = <&cpu_sleep_wait>;
79 operating-points-v2 = <&cpu0_opp_table>;
80 #cooling-cells = <2>;
81 nvmem-cells = <&fuse_grade>;
82 nvmem-cell-names = "speed_grade";
86 cpu0_opp_table: opp-table {
87 compatible = "operating-points-v2";
88 opp-shared;
90 opp-792000000 {
91 opp-hz = /bits/ 64 <792000000>;
92 opp-microvolt = <1000000>;
93 clock-latency-ns = <150000>;
94 opp-supported-hw = <0xf>, <0xf>;
98 ckil: clock-cki {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <32768>;
102 clock-output-names = "ckil";
105 osc: clock-osc {
106 compatible = "fixed-clock";
107 #clock-cells = <0>;
108 clock-frequency = <24000000>;
109 clock-output-names = "osc";
113 compatible = "usb-nop-xceiv";
115 clock-names = "main_clk";
116 #phy-cells = <0>;
120 compatible = "usb-nop-xceiv";
122 clock-names = "main_clk";
123 power-domains = <&pgc_hsic_phy>;
124 #phy-cells = <0>;
128 compatible = "arm,cortex-a7-pmu";
129 interrupt-parent = <&gpc>;
131 interrupt-affinity = <&cpu0>;
136 * non-configurable replicators don't show up on the
139 compatible = "arm,coresight-static-replicator";
141 out-ports {
142 #address-cells = <1>;
143 #size-cells = <0>;
146 reg = <0>;
148 remote-endpoint = <&tpiu_in_port>;
153 reg = <1>;
155 remote-endpoint = <&etr_in_port>;
160 in-ports {
163 remote-endpoint = <&etf_out_port>;
170 compatible = "arm,armv7-timer";
171 arm,cpu-registers-not-fw-configured;
172 interrupt-parent = <&intc>;
180 #address-cells = <1>;
181 #size-cells = <1>;
182 compatible = "simple-bus";
183 interrupt-parent = <&gpc>;
187 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
188 reg = <0x30041000 0x1000>;
190 clock-names = "apb_pclk";
192 ca_funnel_in_ports: in-ports {
195 remote-endpoint = <&etm0_out_port>;
202 out-ports {
205 remote-endpoint = <&hugo_funnel_in_port0>;
213 compatible = "arm,coresight-etm3x", "arm,primecell";
214 reg = <0x3007c000 0x1000>;
217 clock-names = "apb_pclk";
219 out-ports {
222 remote-endpoint = <&ca_funnel_in_port0>;
229 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
230 reg = <0x30083000 0x1000>;
232 clock-names = "apb_pclk";
234 in-ports {
235 #address-cells = <1>;
236 #size-cells = <0>;
239 reg = <0>;
241 remote-endpoint = <&ca_funnel_out_port0>;
246 reg = <1>;
254 out-ports {
257 remote-endpoint = <&etf_in_port>;
264 compatible = "arm,coresight-tmc", "arm,primecell";
265 reg = <0x30084000 0x1000>;
267 clock-names = "apb_pclk";
269 in-ports {
272 remote-endpoint = <&hugo_funnel_out_port0>;
277 out-ports {
280 remote-endpoint = <&replicator_in_port0>;
287 compatible = "arm,coresight-tmc", "arm,primecell";
288 reg = <0x30086000 0x1000>;
290 clock-names = "apb_pclk";
292 in-ports {
295 remote-endpoint = <&replicator_out_port1>;
302 compatible = "arm,coresight-tpiu", "arm,primecell";
303 reg = <0x30087000 0x1000>;
305 clock-names = "apb_pclk";
307 in-ports {
310 remote-endpoint = <&replicator_out_port0>;
316 intc: interrupt-controller@31001000 {
317 compatible = "arm,cortex-a7-gic";
319 #interrupt-cells = <3>;
320 interrupt-controller;
321 interrupt-parent = <&intc>;
322 reg = <0x31001000 0x1000>,
329 compatible = "fsl,aips-bus", "simple-bus";
330 #address-cells = <1>;
331 #size-cells = <1>;
332 reg = <0x30000000 0x400000>;
336 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
337 reg = <0x30200000 0x10000>;
340 gpio-controller;
341 #gpio-cells = <2>;
342 interrupt-controller;
343 #interrupt-cells = <2>;
344 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
348 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
349 reg = <0x30210000 0x10000>;
352 gpio-controller;
353 #gpio-cells = <2>;
354 interrupt-controller;
355 #interrupt-cells = <2>;
356 gpio-ranges = <&iomuxc 0 13 32>;
360 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
361 reg = <0x30220000 0x10000>;
364 gpio-controller;
365 #gpio-cells = <2>;
366 interrupt-controller;
367 #interrupt-cells = <2>;
368 gpio-ranges = <&iomuxc 0 45 29>;
372 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
373 reg = <0x30230000 0x10000>;
376 gpio-controller;
377 #gpio-cells = <2>;
378 interrupt-controller;
379 #interrupt-cells = <2>;
380 gpio-ranges = <&iomuxc 0 74 24>;
384 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
385 reg = <0x30240000 0x10000>;
388 gpio-controller;
389 #gpio-cells = <2>;
390 interrupt-controller;
391 #interrupt-cells = <2>;
392 gpio-ranges = <&iomuxc 0 98 18>;
396 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
397 reg = <0x30250000 0x10000>;
400 gpio-controller;
401 #gpio-cells = <2>;
402 interrupt-controller;
403 #interrupt-cells = <2>;
404 gpio-ranges = <&iomuxc 0 116 23>;
408 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
409 reg = <0x30260000 0x10000>;
412 gpio-controller;
413 #gpio-cells = <2>;
414 interrupt-controller;
415 #interrupt-cells = <2>;
416 gpio-ranges = <&iomuxc 0 139 16>;
420 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
421 reg = <0x30280000 0x10000>;
427 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
428 reg = <0x30290000 0x10000>;
435 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
436 reg = <0x302a0000 0x10000>;
443 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
444 reg = <0x302b0000 0x10000>;
451 compatible = "fsl,imx7d-iomuxc-lpsr";
452 reg = <0x302c0000 0x10000>;
453 fsl,input-sel = <&iomuxc>;
457 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
458 reg = <0x302d0000 0x10000>;
462 clock-names = "ipg", "per";
466 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
467 reg = <0x302e0000 0x10000>;
471 clock-names = "ipg", "per";
476 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
477 reg = <0x302f0000 0x10000>;
481 clock-names = "ipg", "per";
486 compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
487 reg = <0x30300000 0x10000>;
491 clock-names = "ipg", "per";
496 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
497 reg = <0x30320000 0x10000>;
504 compatible = "fsl,imx7d-iomuxc";
505 reg = <0x30330000 0x10000>;
508 gpr: iomuxc-gpr@30340000 {
509 compatible = "fsl,imx7d-iomuxc-gpr",
510 "fsl,imx6q-iomuxc-gpr", "syscon",
511 "simple-mfd";
512 reg = <0x30340000 0x10000>;
514 mux: mux-controller {
515 compatible = "mmio-mux";
516 #mux-control-cells = <0>;
517 mux-reg-masks = <0x14 0x00000010>;
520 video_mux: csi-mux {
521 compatible = "video-mux";
522 mux-controls = <&mux 0>;
523 #address-cells = <1>;
524 #size-cells = <0>;
528 reg = <0>;
532 reg = <1>;
535 remote-endpoint = <&mipi_vc0_to_csi_mux>;
540 reg = <2>;
543 remote-endpoint = <&csi_from_csi_mux>;
550 #address-cells = <1>;
551 #size-cells = <1>;
552 compatible = "fsl,imx7d-ocotp", "syscon";
553 reg = <0x30350000 0x10000>;
557 reg = <0x3c 0x4>;
560 fuse_grade: fuse-grade@10 {
561 reg = <0x10 0x4>;
565 anatop: anatop@30360000 { label
566 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
567 "syscon", "simple-mfd";
568 reg = <0x30360000 0x10000>;
572 reg_1p0d: regulator-vdd1p0d {
573 compatible = "fsl,anatop-regulator";
574 regulator-name = "vdd1p0d";
575 regulator-min-microvolt = <800000>;
576 regulator-max-microvolt = <1200000>;
577 anatop-reg-offset = <0x210>;
578 anatop-vol-bit-shift = <8>;
579 anatop-vol-bit-width = <5>;
580 anatop-min-bit-val = <8>;
581 anatop-min-voltage = <800000>;
582 anatop-max-voltage = <1200000>;
583 anatop-enable-bit = <0>;
586 reg_1p2: regulator-vdd1p2 {
587 compatible = "fsl,anatop-regulator";
588 regulator-name = "vdd1p2";
589 regulator-min-microvolt = <1100000>;
590 regulator-max-microvolt = <1300000>;
591 anatop-reg-offset = <0x220>;
592 anatop-vol-bit-shift = <8>;
593 anatop-vol-bit-width = <5>;
594 anatop-min-bit-val = <0x14>;
595 anatop-min-voltage = <1100000>;
596 anatop-max-voltage = <1300000>;
597 anatop-enable-bit = <0>;
601 compatible = "fsl,imx7d-tempmon";
602 interrupt-parent = <&gpc>;
604 fsl,tempmon = <&anatop>;
605 nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
606 nvmem-cell-names = "calib", "temp_grade";
612 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
613 reg = <0x30370000 0x10000>;
615 snvs_rtc: snvs-rtc-lp {
616 compatible = "fsl,sec-v4.0-mon-rtc-lp";
618 offset = <0x34>;
622 clock-names = "snvs-rtc";
625 snvs_pwrkey: snvs-powerkey {
626 compatible = "fsl,sec-v4.0-pwrkey";
630 clock-names = "snvs-pwrkey";
632 wakeup-source;
637 clks: clock-controller@30380000 {
638 compatible = "fsl,imx7d-ccm";
639 reg = <0x30380000 0x10000>;
642 #clock-cells = <1>;
644 clock-names = "ckil", "osc";
647 src: reset-controller@30390000 {
648 compatible = "fsl,imx7d-src", "syscon";
649 reg = <0x30390000 0x10000>;
651 #reset-cells = <1>;
655 compatible = "fsl,imx7d-gpc";
656 reg = <0x303a0000 0x10000>;
657 interrupt-controller;
659 #interrupt-cells = <3>;
660 interrupt-parent = <&intc>;
661 #power-domain-cells = <1>;
664 #address-cells = <1>;
665 #size-cells = <0>;
667 pgc_mipi_phy: power-domain@0 {
668 #power-domain-cells = <0>;
669 reg = <0>;
670 power-supply = <®_1p0d>;
673 pgc_pcie_phy: power-domain@1 {
674 #power-domain-cells = <0>;
675 reg = <1>;
676 power-supply = <®_1p0d>;
679 pgc_hsic_phy: power-domain@2 {
680 #power-domain-cells = <0>;
681 reg = <2>;
682 power-supply = <®_1p2>;
689 compatible = "fsl,aips-bus", "simple-bus";
690 #address-cells = <1>;
691 #size-cells = <1>;
692 reg = <0x30400000 0x400000>;
696 compatible = "fsl,imx7d-adc";
697 reg = <0x30610000 0x10000>;
700 clock-names = "adc";
701 #io-channel-cells = <1>;
706 compatible = "fsl,imx7d-adc";
707 reg = <0x30620000 0x10000>;
710 clock-names = "adc";
711 #io-channel-cells = <1>;
716 #address-cells = <1>;
717 #size-cells = <0>;
718 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
719 reg = <0x30630000 0x10000>;
723 clock-names = "ipg", "per";
728 compatible = "fsl,vf610-ftm-pwm";
729 reg = <0x30640000 0x10000>;
730 #pwm-cells = <3>;
732 clock-names = "ftm_sys", "ftm_ext",
742 compatible = "fsl,vf610-ftm-pwm";
743 reg = <0x30650000 0x10000>;
744 #pwm-cells = <3>;
746 clock-names = "ftm_sys", "ftm_ext",
756 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
757 reg = <0x30660000 0x10000>;
761 clock-names = "ipg", "per";
762 #pwm-cells = <3>;
767 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
768 reg = <0x30670000 0x10000>;
772 clock-names = "ipg", "per";
773 #pwm-cells = <3>;
778 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
779 reg = <0x30680000 0x10000>;
783 clock-names = "ipg", "per";
784 #pwm-cells = <3>;
789 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
790 reg = <0x30690000 0x10000>;
794 clock-names = "ipg", "per";
795 #pwm-cells = <3>;
800 compatible = "fsl,imx7-csi";
801 reg = <0x30710000 0x10000>;
806 clock-names = "axi", "mclk", "dcic";
811 remote-endpoint = <&csi_mux_to_csi>;
817 compatible = "fsl,imx7d-lcdif", "fsl,imx28-lcdif";
818 reg = <0x30730000 0x10000>;
822 clock-names = "pix", "axi";
826 mipi_csi: mipi-csi@30750000 {
827 compatible = "fsl,imx7-mipi-csi2";
828 reg = <0x30750000 0x10000>;
833 clock-names = "pclk", "wrap", "phy";
834 power-domains = <&pgc_mipi_phy>;
835 phy-supply = <®_1p0d>;
840 #address-cells = <1>;
841 #size-cells = <0>;
844 reg = <0>;
848 reg = <1>;
851 remote-endpoint = <&csi_mux_from_mipi_vc0>;
859 compatible = "fsl,aips-bus", "simple-bus";
860 #address-cells = <1>;
861 #size-cells = <1>;
862 reg = <0x30800000 0x400000>;
865 spba-bus@30800000 {
866 compatible = "fsl,spba-bus", "simple-bus";
867 #address-cells = <1>;
868 #size-cells = <1>;
869 reg = <0x30800000 0x100000>;
873 #address-cells = <1>;
874 #size-cells = <0>;
875 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
876 reg = <0x30820000 0x10000>;
880 clock-names = "ipg", "per";
885 #address-cells = <1>;
886 #size-cells = <0>;
887 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
888 reg = <0x30830000 0x10000>;
892 clock-names = "ipg", "per";
897 #address-cells = <1>;
898 #size-cells = <0>;
899 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
900 reg = <0x30840000 0x10000>;
904 clock-names = "ipg", "per";
909 compatible = "fsl,imx7d-uart",
910 "fsl,imx6q-uart";
911 reg = <0x30860000 0x10000>;
915 clock-names = "ipg", "per";
920 compatible = "fsl,imx7d-uart",
921 "fsl,imx6q-uart";
922 reg = <0x30890000 0x10000>;
926 clock-names = "ipg", "per";
931 compatible = "fsl,imx7d-uart",
932 "fsl,imx6q-uart";
933 reg = <0x30880000 0x10000>;
937 clock-names = "ipg", "per";
942 #sound-dai-cells = <0>;
943 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
944 reg = <0x308a0000 0x10000>;
950 clock-names = "bus", "mclk1", "mclk2", "mclk3";
951 dma-names = "rx", "tx";
957 #sound-dai-cells = <0>;
958 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
959 reg = <0x308b0000 0x10000>;
965 clock-names = "bus", "mclk1", "mclk2", "mclk3";
966 dma-names = "rx", "tx";
972 #sound-dai-cells = <0>;
973 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
974 reg = <0x308c0000 0x10000>;
980 clock-names = "bus", "mclk1", "mclk2", "mclk3";
981 dma-names = "rx", "tx";
988 compatible = "fsl,sec-v4.0";
989 #address-cells = <1>;
990 #size-cells = <1>;
991 reg = <0x30900000 0x40000>;
996 clock-names = "ipg", "aclk";
999 compatible = "fsl,sec-v4.0-job-ring";
1000 reg = <0x1000 0x1000>;
1005 compatible = "fsl,sec-v4.0-job-ring";
1006 reg = <0x2000 0x1000>;
1011 compatible = "fsl,sec-v4.0-job-ring";
1012 reg = <0x3000 0x1000>;
1018 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
1019 reg = <0x30a00000 0x10000>;
1023 clock-names = "ipg", "per";
1024 fsl,stop-mode = <&gpr 0x10 1>;
1029 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
1030 reg = <0x30a10000 0x10000>;
1034 clock-names = "ipg", "per";
1035 fsl,stop-mode = <&gpr 0x10 2>;
1040 #address-cells = <1>;
1041 #size-cells = <0>;
1042 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1043 reg = <0x30a20000 0x10000>;
1050 #address-cells = <1>;
1051 #size-cells = <0>;
1052 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1053 reg = <0x30a30000 0x10000>;
1060 #address-cells = <1>;
1061 #size-cells = <0>;
1062 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1063 reg = <0x30a40000 0x10000>;
1070 #address-cells = <1>;
1071 #size-cells = <0>;
1072 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1073 reg = <0x30a50000 0x10000>;
1080 compatible = "fsl,imx7d-uart",
1081 "fsl,imx6q-uart";
1082 reg = <0x30a60000 0x10000>;
1086 clock-names = "ipg", "per";
1091 compatible = "fsl,imx7d-uart",
1092 "fsl,imx6q-uart";
1093 reg = <0x30a70000 0x10000>;
1097 clock-names = "ipg", "per";
1102 compatible = "fsl,imx7d-uart",
1103 "fsl,imx6q-uart";
1104 reg = <0x30a80000 0x10000>;
1108 clock-names = "ipg", "per";
1113 compatible = "fsl,imx7d-uart",
1114 "fsl,imx6q-uart";
1115 reg = <0x30a90000 0x10000>;
1119 clock-names = "ipg", "per";
1124 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1125 reg = <0x30aa0000 0x10000>;
1128 #mbox-cells = <2>;
1133 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1134 reg = <0x30ab0000 0x10000>;
1137 #mbox-cells = <2>;
1138 fsl,mu-side-b;
1143 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1144 reg = <0x30b10000 0x200>;
1149 phy-clkgate-delay-us = <400>;
1154 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1155 reg = <0x30b30000 0x200>;
1162 phy-clkgate-delay-us = <400>;
1167 #index-cells = <1>;
1168 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1169 reg = <0x30b10200 0x200>;
1173 #index-cells = <1>;
1174 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1175 reg = <0x30b30200 0x200>;
1179 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1180 reg = <0x30b40000 0x10000>;
1185 clock-names = "ipg", "ahb", "per";
1186 bus-width = <4>;
1191 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1192 reg = <0x30b50000 0x10000>;
1197 clock-names = "ipg", "ahb", "per";
1198 bus-width = <4>;
1203 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1204 reg = <0x30b60000 0x10000>;
1209 clock-names = "ipg", "ahb", "per";
1210 bus-width = <4>;
1215 compatible = "fsl,imx7d-qspi";
1216 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1217 reg-names = "QuadSPI", "QuadSPI-memory";
1218 #address-cells = <1>;
1219 #size-cells = <0>;
1223 clock-names = "qspi_en", "qspi";
1227 sdma: dma-controller@30bd0000 {
1228 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1229 reg = <0x30bd0000 0x10000>;
1233 clock-names = "ipg", "ahb";
1234 #dma-cells = <3>;
1235 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1239 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1240 reg = <0x30be0000 0x10000>;
1241 interrupt-names = "int0", "int1", "int2", "pps";
1251 clock-names = "ipg", "ahb", "ptp",
1253 fsl,num-tx-queues = <3>;
1254 fsl,num-rx-queues = <3>;
1255 fsl,stop-mode = <&gpr 0x10 3>;
1260 dma_apbh: dma-apbh@33000000 {
1261 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1262 reg = <0x33000000 0x2000>;
1267 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
1268 #dma-cells = <1>;
1269 dma-channels = <4>;
1273 gpmi: nand-controller@33002000{
1274 compatible = "fsl,imx7d-gpmi-nand";
1275 #address-cells = <1>;
1276 #size-cells = <1>;
1277 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1278 reg-names = "gpmi-nand", "bch";
1280 interrupt-names = "bch";
1283 clock-names = "gpmi_io", "gpmi_bch_apb";
1285 dma-names = "rx-tx";
1287 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1288 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;