Lines Matching +full:0 +full:x10000

56 		#size-cells = <0>;
63 arm,psci-suspend-param = <0x0010000>;
71 cpu0: cpu@0 {
74 reg = <0>;
94 opp-supported-hw = <0xf>, <0xf>;
100 #clock-cells = <0>;
107 #clock-cells = <0>;
116 #phy-cells = <0>;
124 #phy-cells = <0>;
143 #size-cells = <0>;
145 port@0 {
146 reg = <0>;
188 reg = <0x30041000 0x1000>;
214 reg = <0x3007c000 0x1000>;
230 reg = <0x30083000 0x1000>;
236 #size-cells = <0>;
238 port@0 {
239 reg = <0>;
265 reg = <0x30084000 0x1000>;
288 reg = <0x30086000 0x1000>;
303 reg = <0x30087000 0x1000>;
322 reg = <0x31001000 0x1000>,
323 <0x31002000 0x2000>,
324 <0x31004000 0x2000>,
325 <0x31006000 0x2000>;
332 reg = <0x30000000 0x400000>;
337 reg = <0x30200000 0x10000>;
344 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
349 reg = <0x30210000 0x10000>;
356 gpio-ranges = <&iomuxc 0 13 32>;
361 reg = <0x30220000 0x10000>;
368 gpio-ranges = <&iomuxc 0 45 29>;
373 reg = <0x30230000 0x10000>;
380 gpio-ranges = <&iomuxc 0 74 24>;
385 reg = <0x30240000 0x10000>;
392 gpio-ranges = <&iomuxc 0 98 18>;
397 reg = <0x30250000 0x10000>;
404 gpio-ranges = <&iomuxc 0 116 23>;
409 reg = <0x30260000 0x10000>;
416 gpio-ranges = <&iomuxc 0 139 16>;
421 reg = <0x30280000 0x10000>;
428 reg = <0x30290000 0x10000>;
436 reg = <0x302a0000 0x10000>;
444 reg = <0x302b0000 0x10000>;
452 reg = <0x302c0000 0x10000>;
458 reg = <0x302d0000 0x10000>;
467 reg = <0x302e0000 0x10000>;
477 reg = <0x302f0000 0x10000>;
487 reg = <0x30300000 0x10000>;
497 reg = <0x30320000 0x10000>;
505 reg = <0x30330000 0x10000>;
512 reg = <0x30340000 0x10000>;
516 #mux-control-cells = <0>;
517 mux-reg-masks = <0x14 0x00000010>;
522 mux-controls = <&mux 0>;
524 #size-cells = <0>;
527 port@0 {
528 reg = <0>;
553 reg = <0x30350000 0x10000>;
557 reg = <0x3c 0x4>;
561 reg = <0x10 0x4>;
568 reg = <0x30360000 0x10000>;
577 anatop-reg-offset = <0x210>;
583 anatop-enable-bit = <0>;
591 anatop-reg-offset = <0x220>;
594 anatop-min-bit-val = <0x14>;
597 anatop-enable-bit = <0>;
612 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
613 reg = <0x30370000 0x10000>;
616 compatible = "fsl,sec-v4.0-mon-rtc-lp";
618 offset = <0x34>;
626 compatible = "fsl,sec-v4.0-pwrkey";
639 reg = <0x30380000 0x10000>;
649 reg = <0x30390000 0x10000>;
656 reg = <0x303a0000 0x10000>;
665 #size-cells = <0>;
667 pgc_mipi_phy: power-domain@0 {
668 #power-domain-cells = <0>;
669 reg = <0>;
674 #power-domain-cells = <0>;
680 #power-domain-cells = <0>;
692 reg = <0x30400000 0x400000>;
697 reg = <0x30610000 0x10000>;
707 reg = <0x30620000 0x10000>;
717 #size-cells = <0>;
719 reg = <0x30630000 0x10000>;
729 reg = <0x30640000 0x10000>;
743 reg = <0x30650000 0x10000>;
757 reg = <0x30660000 0x10000>;
768 reg = <0x30670000 0x10000>;
779 reg = <0x30680000 0x10000>;
790 reg = <0x30690000 0x10000>;
801 reg = <0x30710000 0x10000>;
818 reg = <0x30730000 0x10000>;
828 reg = <0x30750000 0x10000>;
841 #size-cells = <0>;
843 port@0 {
844 reg = <0>;
862 reg = <0x30800000 0x400000>;
869 reg = <0x30800000 0x100000>;
874 #size-cells = <0>;
876 reg = <0x30820000 0x10000>;
886 #size-cells = <0>;
888 reg = <0x30830000 0x10000>;
898 #size-cells = <0>;
900 reg = <0x30840000 0x10000>;
911 reg = <0x30860000 0x10000>;
922 reg = <0x30890000 0x10000>;
933 reg = <0x30880000 0x10000>;
942 #sound-dai-cells = <0>;
944 reg = <0x308a0000 0x10000>;
952 dmas = <&sdma 8 24 0>, <&sdma 9 24 0>;
957 #sound-dai-cells = <0>;
959 reg = <0x308b0000 0x10000>;
967 dmas = <&sdma 10 24 0>, <&sdma 11 24 0>;
972 #sound-dai-cells = <0>;
974 reg = <0x308c0000 0x10000>;
982 dmas = <&sdma 12 24 0>, <&sdma 13 24 0>;
988 compatible = "fsl,sec-v4.0";
991 reg = <0x30900000 0x40000>;
992 ranges = <0 0x30900000 0x40000>;
999 compatible = "fsl,sec-v4.0-job-ring";
1000 reg = <0x1000 0x1000>;
1005 compatible = "fsl,sec-v4.0-job-ring";
1006 reg = <0x2000 0x1000>;
1011 compatible = "fsl,sec-v4.0-job-ring";
1012 reg = <0x3000 0x1000>;
1019 reg = <0x30a00000 0x10000>;
1024 fsl,stop-mode = <&gpr 0x10 1>;
1030 reg = <0x30a10000 0x10000>;
1035 fsl,stop-mode = <&gpr 0x10 2>;
1041 #size-cells = <0>;
1043 reg = <0x30a20000 0x10000>;
1051 #size-cells = <0>;
1053 reg = <0x30a30000 0x10000>;
1061 #size-cells = <0>;
1063 reg = <0x30a40000 0x10000>;
1071 #size-cells = <0>;
1073 reg = <0x30a50000 0x10000>;
1082 reg = <0x30a60000 0x10000>;
1093 reg = <0x30a70000 0x10000>;
1104 reg = <0x30a80000 0x10000>;
1115 reg = <0x30a90000 0x10000>;
1125 reg = <0x30aa0000 0x10000>;
1134 reg = <0x30ab0000 0x10000>;
1144 reg = <0x30b10000 0x200>;
1148 fsl,usbmisc = <&usbmisc1 0>;
1155 reg = <0x30b30000 0x200>;
1159 fsl,usbmisc = <&usbmisc3 0>;
1169 reg = <0x30b10200 0x200>;
1175 reg = <0x30b30200 0x200>;
1180 reg = <0x30b40000 0x10000>;
1192 reg = <0x30b50000 0x10000>;
1204 reg = <0x30b60000 0x10000>;
1216 reg = <0x30bb0000 0x10000>, <0x60000000 0x10000000>;
1219 #size-cells = <0>;
1229 reg = <0x30bd0000 0x10000>;
1240 reg = <0x30be0000 0x10000>;
1255 fsl,stop-mode = <&gpr 0x10 3>;
1262 reg = <0x33000000 0x2000>;
1277 reg = <0x33002000 0x2000>, <0x33004000 0x4000>;
1284 dmas = <&dma_apbh 0>;