Lines Matching +full:gpio2 +full:- +full:output +full:- +full:enable
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 compatible = "storopack,imx7d-smegw01", "fsl,imx7d";
24 stdout-path = &uart1;
32 reg_lte_on: regulator-lte-on {
33 compatible = "regulator-fixed";
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_lte_on>;
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 regulator-name = "lte_on";
40 enable-active-high;
41 regulator-always-on;
44 reg_lte_nreset: regulator-lte-nreset {
45 compatible = "regulator-fixed";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_lte_nreset>;
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50 regulator-name = "LTE_nReset";
52 enable-active-high;
53 regulator-always-on;
56 reg_wifi: regulator-wifi {
57 compatible = "regulator-fixed";
58 gpio = <&gpio2 30 GPIO_ACTIVE_HIGH>;
59 enable-active-high;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_wifi>;
62 regulator-name = "wifi_reg";
63 regulator-min-microvolt = <3300000>;
64 regulator-max-microvolt = <3300000>;
67 reg_wlan_rfkill: regulator-wlan-rfkill {
68 compatible = "regulator-fixed";
69 pinctrl-names = "default";
70 pinctrl-2 = <&pinctrl_rfkill>;
71 regulator-min-microvolt = <3300000>;
72 regulator-max-microvolt = <3300000>;
73 regulator-name = "wlan_rfkill";
74 gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
75 enable-active-high;
76 regulator-always-on;
79 reg_usbotg_vbus: regulator-usbotg-vbus {
80 compatible = "regulator-fixed";
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_usbotg1_pwr_gpio>;
83 regulator-name = "usb_otg_vbus";
84 regulator-min-microvolt = <5000000>;
85 regulator-max-microvolt = <5000000>;
87 enable-active-high;
92 pinctrl-names = "default";
93 pinctrl-0 = <&pinctrl_ecspi1>;
94 cs-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
100 #address-cells = <1>;
101 #size-cells = <1>;
102 spi-max-frequency = <16000000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_enet1>;
109 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
111 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
112 assigned-clock-rates = <0>, <100000000>;
113 phy-mode = "rgmii-id";
114 phy-handle = <ðphy0>;
115 fsl,magic-packet;
119 #address-cells = <1>;
120 #size-cells = <0>;
122 ethphy0: ethernet-phy@1 {
123 compatible = "ethernet-phy-id0022.1622",
124 "ethernet-phy-ieee802.3-c22";
126 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
129 ethphy1: ethernet-phy@2 {
130 compatible = "ethernet-phy-id0022.1622",
131 "ethernet-phy-ieee802.3-c22";
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_enet2>;
140 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
142 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
143 assigned-clock-rates = <0>, <100000000>;
144 phy-mode = "rgmii-id";
145 phy-handle = <ðphy1>;
146 fsl,magic-packet;
151 pinctrl-names = "default";
152 pinctrl-0 =<&pinctrl_i2c2>;
153 clock-frequency = <100000>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_rtc_int>;
161 interrupt-parent = <&gpio2>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_flexcan1>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_flexcan2>;
179 pinctrl-names = "default";
180 pinctrl-0 = <&pinctrl_uart1>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_uart3>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usbotg1_lpsr>;
194 vbus-supply = <®_usbotg_vbus>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_usbotg2>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_usdhc1>;
208 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
209 no-1-8-v;
210 wakeup-source;
211 keep-power-in-suspend;
216 pinctrl-names = "default";
217 pinctrl-0 = <&pinctrl_usdhc2>;
218 bus-width = <4>;
219 no-1-8-v;
220 non-removable;
221 vmmc-supply = <®_wifi>;
222 wakeup-source;
227 pinctrl-names = "default", "state_100mhz", "state_200mhz";
228 pinctrl-0 = <&pinctrl_usdhc3>;
229 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
230 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
231 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
232 assigned-clock-rates = <400000000>;
233 max-frequency = <200000000>;
234 bus-width = <8>;
235 fsl,tuning-step = <1>;
236 non-removable;
237 cap-mmc-highspeed;
238 cap-mmc-hw-reset;
239 mmc-hs200-1_8v;
240 mmc-ddr-1_8v;
245 pinctrl-names = "default";
246 pinctrl-0 = <&pinctrl_wdog>;
247 fsl,ext-reset-output;
363 pinctrl_usbotg1_pwr: usbotg1-pwr {
369 pinctrl_usbotg1_pwr_gpio: usbotg1-pwr-gpio {
421 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
437 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {