Lines Matching +full:imx21 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
58 #size-cells = <0>;
61 compatible = "arm,cortex-a7";
64 clock-frequency = <696000000>;
65 clock-latency = <61036>; /* two CLK32 periods */
66 #cooling-cells = <2>;
67 operating-points =
73 fsl,soc-operating-points =
86 clock-names = "arm", "pll2_bus", "pll2_pfd2_396m",
89 arm-supply = <®_arm>;
90 soc-supply = <®_soc>;
91 nvmem-cells = <&cpu_speed_grade>;
92 nvmem-cell-names = "speed_grade";
97 compatible = "arm,armv7-timer";
102 interrupt-parent = <&intc>;
106 ckil: clock-cli {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <32768>;
110 clock-output-names = "ckil";
113 osc: clock-osc {
114 compatible = "fixed-clock";
115 #clock-cells = <0>;
116 clock-frequency = <24000000>;
117 clock-output-names = "osc";
120 ipp_di0: clock-di0 {
121 compatible = "fixed-clock";
122 #clock-cells = <0>;
123 clock-frequency = <0>;
124 clock-output-names = "ipp_di0";
127 ipp_di1: clock-di1 {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <0>;
131 clock-output-names = "ipp_di1";
135 compatible = "arm,cortex-a7-pmu";
136 interrupt-parent = <&gpc>;
141 #address-cells = <1>;
142 #size-cells = <1>;
143 compatible = "simple-bus";
144 interrupt-parent = <&gpc>;
148 compatible = "mmio-sram";
151 #address-cells = <1>;
152 #size-cells = <1>;
155 intc: interrupt-controller@a01000 {
156 compatible = "arm,gic-400", "arm,cortex-a7-gic";
158 #interrupt-cells = <3>;
159 interrupt-controller;
160 interrupt-parent = <&intc>;
167 dma_apbh: dma-apbh@1804000 {
168 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
174 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
175 #dma-cells = <1>;
176 dma-channels = <4>;
180 gpmi: nand-controller@1806000 {
181 compatible = "fsl,imx6q-gpmi-nand";
182 #address-cells = <1>;
183 #size-cells = <1>;
185 reg-names = "gpmi-nand", "bch";
187 interrupt-names = "bch";
193 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
196 dma-names = "rx-tx";
201 compatible = "fsl,aips-bus", "simple-bus";
202 #address-cells = <1>;
203 #size-cells = <1>;
207 spba-bus@2000000 {
208 compatible = "fsl,spba-bus", "simple-bus";
209 #address-cells = <1>;
210 #size-cells = <1>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
222 clock-names = "ipg", "per";
224 dma-names = "rx", "tx";
229 #address-cells = <1>;
230 #size-cells = <0>;
231 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
236 clock-names = "ipg", "per";
238 dma-names = "rx", "tx";
243 #address-cells = <1>;
244 #size-cells = <0>;
245 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
250 clock-names = "ipg", "per";
252 dma-names = "rx", "tx";
257 #address-cells = <1>;
258 #size-cells = <0>;
259 compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi";
264 clock-names = "ipg", "per";
266 dma-names = "rx", "tx";
271 compatible = "fsl,imx6ul-uart",
272 "fsl,imx6q-uart";
277 clock-names = "ipg", "per";
282 compatible = "fsl,imx6ul-uart",
283 "fsl,imx6q-uart";
288 clock-names = "ipg", "per";
293 compatible = "fsl,imx6ul-uart",
294 "fsl,imx6q-uart";
299 clock-names = "ipg", "per";
304 #sound-dai-cells = <0>;
305 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
311 clock-names = "bus", "mclk1", "mclk2", "mclk3";
314 dma-names = "rx", "tx";
319 #sound-dai-cells = <0>;
320 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
326 clock-names = "bus", "mclk1", "mclk2", "mclk3";
329 dma-names = "rx", "tx";
334 #sound-dai-cells = <0>;
335 compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai";
341 clock-names = "bus", "mclk1", "mclk2", "mclk3";
344 dma-names = "rx", "tx";
349 compatible = "fsl,imx6ul-asrc", "fsl,imx53-asrc";
359 clock-names = "mem", "ipg", "asrck_0",
366 dma-names = "rxa", "rxb", "rxc",
368 fsl,asrc-rate = <48000>;
369 fsl,asrc-width = <16>;
375 compatible = "fsl,imx6ul-tsc";
381 clock-names = "tsc", "adc";
386 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
391 clock-names = "ipg", "per";
392 #pwm-cells = <3>;
397 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
402 clock-names = "ipg", "per";
403 #pwm-cells = <3>;
408 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
413 clock-names = "ipg", "per";
414 #pwm-cells = <3>;
419 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
424 clock-names = "ipg", "per";
425 #pwm-cells = <3>;
430 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
435 clock-names = "ipg", "per";
436 fsl,stop-mode = <&gpr 0x10 1>;
441 compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan";
446 clock-names = "ipg", "per";
447 fsl,stop-mode = <&gpr 0x10 2>;
452 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
457 clock-names = "ipg", "per";
461 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
466 gpio-controller;
467 #gpio-cells = <2>;
468 interrupt-controller;
469 #interrupt-cells = <2>;
470 gpio-ranges = <&iomuxc 0 23 10>, <&iomuxc 10 17 6>,
475 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
480 gpio-controller;
481 #gpio-cells = <2>;
482 interrupt-controller;
483 #interrupt-cells = <2>;
484 gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>;
488 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
493 gpio-controller;
494 #gpio-cells = <2>;
495 interrupt-controller;
496 #interrupt-cells = <2>;
497 gpio-ranges = <&iomuxc 0 65 29>;
501 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
506 gpio-controller;
507 #gpio-cells = <2>;
508 interrupt-controller;
509 #interrupt-cells = <2>;
510 gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>;
514 compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio";
519 gpio-controller;
520 #gpio-cells = <2>;
521 interrupt-controller;
522 #interrupt-cells = <2>;
523 gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>;
527 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
529 interrupt-names = "int0", "pps";
537 clock-names = "ipg", "ahb", "ptp",
539 fsl,num-tx-queues = <1>;
540 fsl,num-rx-queues = <1>;
541 fsl,stop-mode = <&gpr 0x10 4>;
542 fsl,magic-packet;
547 compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp";
555 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
562 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
569 clks: clock-controller@20c4000 {
570 compatible = "fsl,imx6ul-ccm";
574 #clock-cells = <1>;
576 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
580 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
581 "syscon", "simple-mfd";
587 reg_3p0: regulator-3p0 {
588 compatible = "fsl,anatop-regulator";
589 regulator-name = "vdd3p0";
590 regulator-min-microvolt = <2625000>;
591 regulator-max-microvolt = <3400000>;
592 anatop-reg-offset = <0x120>;
593 anatop-vol-bit-shift = <8>;
594 anatop-vol-bit-width = <5>;
595 anatop-min-bit-val = <0>;
596 anatop-min-voltage = <2625000>;
597 anatop-max-voltage = <3400000>;
598 anatop-enable-bit = <0>;
601 reg_arm: regulator-vddcore {
602 compatible = "fsl,anatop-regulator";
603 regulator-name = "cpu";
604 regulator-min-microvolt = <725000>;
605 regulator-max-microvolt = <1450000>;
606 regulator-always-on;
607 anatop-reg-offset = <0x140>;
608 anatop-vol-bit-shift = <0>;
609 anatop-vol-bit-width = <5>;
610 anatop-delay-reg-offset = <0x170>;
611 anatop-delay-bit-shift = <24>;
612 anatop-delay-bit-width = <2>;
613 anatop-min-bit-val = <1>;
614 anatop-min-voltage = <725000>;
615 anatop-max-voltage = <1450000>;
618 reg_soc: regulator-vddsoc {
619 compatible = "fsl,anatop-regulator";
620 regulator-name = "vddsoc";
621 regulator-min-microvolt = <725000>;
622 regulator-max-microvolt = <1450000>;
623 regulator-always-on;
624 anatop-reg-offset = <0x140>;
625 anatop-vol-bit-shift = <18>;
626 anatop-vol-bit-width = <5>;
627 anatop-delay-reg-offset = <0x170>;
628 anatop-delay-bit-shift = <28>;
629 anatop-delay-bit-width = <2>;
630 anatop-min-bit-val = <1>;
631 anatop-min-voltage = <725000>;
632 anatop-max-voltage = <1450000>;
636 compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
637 interrupt-parent = <&gpc>;
640 nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
641 nvmem-cell-names = "calib", "temp_grade";
647 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
651 phy-3p0-supply = <®_3p0>;
656 compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
660 phy-3p0-supply = <®_3p0>;
665 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
668 snvs_rtc: snvs-rtc-lp {
669 compatible = "fsl,sec-v4.0-mon-rtc-lp";
676 snvs_poweroff: snvs-poweroff {
677 compatible = "syscon-poweroff";
685 snvs_pwrkey: snvs-powerkey {
686 compatible = "fsl,sec-v4.0-pwrkey";
690 wakeup-source;
694 snvs_lpgpr: snvs-lpgpr {
695 compatible = "fsl,imx6ul-snvs-lpgpr";
709 src: reset-controller@20d8000 {
710 compatible = "fsl,imx6ul-src", "fsl,imx51-src";
714 #reset-cells = <1>;
718 compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc";
720 interrupt-controller;
721 #interrupt-cells = <3>;
723 interrupt-parent = <&intc>;
727 compatible = "fsl,imx6ul-iomuxc";
731 gpr: iomuxc-gpr@20e4000 {
732 compatible = "fsl,imx6ul-iomuxc-gpr",
733 "fsl,imx6q-iomuxc-gpr", "syscon";
738 compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt";
743 clock-names = "ipg", "per";
747 sdma: dma-controller@20ec000 {
748 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma",
749 "fsl,imx35-sdma";
754 clock-names = "ipg", "ahb";
755 #dma-cells = <3>;
756 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
760 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
765 clock-names = "ipg", "per";
766 #pwm-cells = <3>;
771 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
776 clock-names = "ipg", "per";
777 #pwm-cells = <3>;
782 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
787 clock-names = "ipg", "per";
788 #pwm-cells = <3>;
793 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm";
798 clock-names = "ipg", "per";
799 #pwm-cells = <3>;
805 compatible = "fsl,aips-bus", "simple-bus";
806 #address-cells = <1>;
807 #size-cells = <1>;
812 compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0";
813 #address-cells = <1>;
814 #size-cells = <1>;
820 clock-names = "ipg", "aclk", "mem";
823 compatible = "fsl,sec-v4.0-job-ring";
829 compatible = "fsl,sec-v4.0-job-ring";
835 compatible = "fsl,sec-v4.0-job-ring";
842 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
849 ahb-burst-config = <0x0>;
850 tx-burst-size-dword = <0x10>;
851 rx-burst-size-dword = <0x10>;
856 compatible = "fsl,imx6ul-usb", "fsl,imx27-usb";
862 ahb-burst-config = <0x0>;
863 tx-burst-size-dword = <0x10>;
864 rx-burst-size-dword = <0x10>;
869 #index-cells = <1>;
870 compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc";
875 compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
877 interrupt-names = "int0", "pps";
885 clock-names = "ipg", "ahb", "ptp",
887 fsl,num-tx-queues = <1>;
888 fsl,num-rx-queues = <1>;
889 fsl,stop-mode = <&gpr 0x10 3>;
890 fsl,magic-packet;
895 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
901 clock-names = "ipg", "ahb", "per";
902 fsl,tuning-step = <2>;
903 fsl,tuning-start-tap = <20>;
904 bus-width = <4>;
909 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
915 clock-names = "ipg", "ahb", "per";
916 bus-width = <4>;
917 fsl,tuning-step = <2>;
918 fsl,tuning-start-tap = <20>;
923 compatible = "fsl,imx6ul-adc", "fsl,vf610-adc";
927 clock-names = "adc";
928 fsl,adck-max-frequency = <30000000>, <40000000>,
934 #address-cells = <1>;
935 #size-cells = <0>;
936 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
944 #address-cells = <1>;
945 #size-cells = <0>;
946 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
954 #address-cells = <1>;
955 #size-cells = <0>;
956 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
963 memory-controller@21b0000 {
964 compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc";
970 #address-cells = <2>;
971 #size-cells = <1>;
972 compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim";
976 fsl,weim-cs-gpr = <&gpr>;
981 #address-cells = <1>;
982 #size-cells = <1>;
983 compatible = "fsl,imx6ul-ocotp", "syscon";
991 tempmon_temp_grade: temp-grade@20 {
995 cpu_speed_grade: speed-grade@10 {
1001 compatible = "fsl,imx6ul-csi";
1005 clock-names = "mclk";
1010 compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif";
1016 clock-names = "pix", "axi", "disp_axi";
1021 compatible = "fsl,imx6ul-pxp";
1025 clock-names = "axi";
1029 #address-cells = <1>;
1030 #size-cells = <0>;
1031 compatible = "fsl,imx6ul-qspi";
1033 reg-names = "QuadSPI", "QuadSPI-memory";
1037 clock-names = "qspi_en", "qspi";
1042 compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
1050 compatible = "fsl,imx6ul-uart",
1051 "fsl,imx6q-uart";
1056 clock-names = "ipg", "per";
1061 compatible = "fsl,imx6ul-uart",
1062 "fsl,imx6q-uart";
1067 clock-names = "ipg", "per";
1072 compatible = "fsl,imx6ul-uart",
1073 "fsl,imx6q-uart";
1078 clock-names = "ipg", "per";
1083 compatible = "fsl,imx6ul-uart",
1084 "fsl,imx6q-uart";
1089 clock-names = "ipg", "per";
1094 #address-cells = <1>;
1095 #size-cells = <0>;
1096 compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c";
1104 compatible = "fsl,imx6ul-uart",
1105 "fsl,imx6q-uart";
1110 clock-names = "ipg", "per";