Lines Matching +full:0 +full:x80000000
19 pinctrl-0 = <&pinctrl_bp1>;
33 pinctrl-0 = <&pinctrl_led1>;
53 pinctrl-0 = <&pinctrl_audmux>;
59 pinctrl-0 = <&pinctrl_esdhc1>;
67 reg = <0x1a>;
75 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000
76 MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000
77 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000
78 MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000
83 fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>;
88 MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
89 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
90 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
91 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
92 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
93 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
94 MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */
99 fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>;
103 fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;
108 MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5
109 MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5
110 MX35_PAD_CTS1__UART1_CTS 0x1c5
111 MX35_PAD_RTS1__UART1_RTS 0x1c5
117 MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5
118 MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5
119 MX35_PAD_RTS2__UART2_RTS 0x1c5
120 MX35_PAD_CTS2__UART2_CTS 0x1c5
133 pinctrl-0 = <&pinctrl_uart1>;
140 pinctrl-0 = <&pinctrl_uart2>;