Lines Matching +full:0 +full:x800c0000
43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0>;
56 reg = <0x80000000 0x80000>;
63 reg = <0x80000000 0x3c900>;
70 reg = <0x80000000 0x2000>;
74 reg = <0x80002000 0x2000>;
83 reg = <0x80004000 0x2000>;
87 87 86 0 0>;
98 reg = <0x80006000 0x800>;
107 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
122 #size-cells = <0>;
123 reg = <0x80010000 0x2000>;
126 dmas = <&dma_apbh 0>;
133 #size-cells = <0>;
134 reg = <0x80012000 0x2000>;
144 #size-cells = <0>;
145 reg = <0x80014000 0x2000>;
155 #size-cells = <0>;
156 reg = <0x80016000 0x2000>;
166 #size-cells = <0>;
168 reg = <0x80018000 0x2000>;
170 gpio0: gpio@0 {
172 reg = <0>;
220 duart_pins_a: duart@0 {
221 reg = <0>;
242 duart_4pins_a: duart-4pins@0 {
243 reg = <0>;
255 gpmi_pins_a: gpmi-nand@0 {
256 reg = <0>;
279 gpmi_status_cfg: gpmi-status-cfg@0 {
280 reg = <0>;
289 auart0_pins_a: auart0@0 {
290 reg = <0>;
302 auart0_2pins_a: auart0-2pins@0 {
303 reg = <0>;
313 auart1_pins_a: auart1@0 {
314 reg = <0>;
326 auart1_2pins_a: auart1-2pins@0 {
327 reg = <0>;
337 auart2_2pins_a: auart2-2pins@0 {
338 reg = <0>;
359 auart2_pins_a: auart2-pins@0 {
360 reg = <0>;
372 auart3_pins_a: auart3@0 {
373 reg = <0>;
385 auart3_2pins_a: auart3-2pins@0 {
386 reg = <0>;
407 auart4_2pins_a: auart4@0 {
408 reg = <0>;
429 mac0_pins_a: mac0@0 {
430 reg = <0>;
473 mac1_pins_a: mac1@0 {
474 reg = <0>;
488 mmc0_8bit_pins_a: mmc0-8bit@0 {
489 reg = <0>;
508 mmc0_4bit_pins_a: mmc0-4bit@0 {
509 reg = <0>;
524 mmc0_cd_cfg: mmc0-cd-cfg@0 {
525 reg = <0>;
532 mmc0_sck_cfg: mmc0-sck-cfg@0 {
533 reg = <0>;
541 mmc1_4bit_pins_a: mmc1-4bit@0 {
542 reg = <0>;
557 mmc1_cd_cfg: mmc1-cd-cfg@0 {
558 reg = <0>;
565 mmc1_sck_cfg: mmc1-sck-cfg@0 {
566 reg = <0>;
575 mmc2_4bit_pins_a: mmc2-4bit@0 {
576 reg = <0>;
607 mmc2_cd_cfg: mmc2-cd-cfg@0 {
608 reg = <0>;
615 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
616 reg = <0>;
633 i2c0_pins_a: i2c0@0 {
634 reg = <0>;
655 i2c1_pins_a: i2c1@0 {
656 reg = <0>;
677 saif0_pins_a: saif0@0 {
678 reg = <0>;
702 saif1_pins_a: saif1@0 {
703 reg = <0>;
712 pwm0_pins_a: pwm0@0 {
713 reg = <0>;
722 pwm2_pins_a: pwm2@0 {
723 reg = <0>;
732 pwm3_pins_a: pwm3@0 {
733 reg = <0>;
752 pwm4_pins_a: pwm4@0 {
753 reg = <0>;
762 lcdif_24bit_pins_a: lcdif-24bit@0 {
763 reg = <0>;
795 lcdif_18bit_pins_a: lcdif-18bit@0 {
796 reg = <0>;
822 lcdif_16bit_pins_a: lcdif-16bit@0 {
823 reg = <0>;
847 lcdif_sync_pins_a: lcdif-sync@0 {
848 reg = <0>;
860 can0_pins_a: can0@0 {
861 reg = <0>;
871 can1_pins_a: can1@0 {
872 reg = <0>;
882 spi2_pins_a: spi2@0 {
883 reg = <0>;
895 spi3_pins_a: spi3@0 {
896 reg = <0>;
923 usb0_pins_a: usb0@0 {
924 reg = <0>;
943 usb1_pins_a: usb1@0 {
944 reg = <0>;
963 usb0_id_pins_a: usb0id@0 {
964 reg = <0>;
973 usb0_id_pins_b: usb0id1@0 {
974 reg = <0>;
987 reg = <0x8001c000 0x2000>;
993 reg = <0x80022000 0x2000>;
999 reg = <0x80024000 0x2000>;
1000 interrupts = <78 79 66 0
1015 reg = <0x80028000 0x2000>;
1021 reg = <0x8002a000 0x2000>;
1030 reg = <0x8002c000 0x2000>;
1035 reg = <0x8002e000 0x2000>;
1041 reg = <0x80030000 0x2000>;
1051 reg = <0x80032000 0x2000>;
1060 reg = <0x80034000 0x2000>;
1068 reg = <0x8003c000 0x200>;
1073 reg = <0x8003c200 0x100>;
1078 reg = <0x8003c300 0x100>;
1083 reg = <0x8003c400 0x100>;
1088 reg = <0x8003c500 0x100>;
1093 reg = <0x8003c700 0x100>;
1098 reg = <0x8003c800 0x100>;
1107 reg = <0x80040000 0x40000>;
1112 reg = <0x80040000 0x2000>;
1117 #sound-dai-cells = <0>;
1119 reg = <0x80042000 0x2000>;
1121 #clock-cells = <0>;
1129 reg = <0x80044000 0x2000>;
1134 #sound-dai-cells = <0>;
1136 reg = <0x80046000 0x2000>;
1146 reg = <0x80050000 0x2000>;
1155 reg = <0x80054000 0x2000>;
1164 reg = <0x80056000 0x2000>;
1170 #size-cells = <0>;
1172 reg = <0x80058000 0x2000>;
1182 #size-cells = <0>;
1184 reg = <0x8005a000 0x2000>;
1194 reg = <0x80064000 0x2000>;
1203 reg = <0x80068000 0x2000>;
1210 reg = <0x8006a000 0x2000>;
1220 reg = <0x8006c000 0x2000>;
1230 reg = <0x8006e000 0x2000>;
1240 reg = <0x80070000 0x2000>;
1250 reg = <0x80072000 0x2000>;
1252 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1260 reg = <0x80074000 0x1000>;
1269 reg = <0x8007c000 0x2000>;
1276 reg = <0x8007e000 0x2000>;
1287 reg = <0x80080000 0x80000>;
1292 reg = <0x80080000 0x10000>;
1301 reg = <0x80090000 0x10000>;
1310 reg = <0x800c0000 0x10000>;
1316 reg = <0x800f0000 0x4000>;
1325 reg = <0x800f4000 0x4000>;
1333 reg = <0x800f8000 0x8000>;