Lines Matching +full:gemini +full:- +full:enable +full:- +full:sata +full:- +full:bridge
1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for Cortina systems Gemini SoC
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/clock/cortina,gemini-clock.h>
8 #include <dt-bindings/reset/cortina,gemini-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 compatible = "simple-bus";
17 interrupt-parent = <&intcon>;
20 compatible = "cortina,gemini-flash", "cfi-flash";
22 pinctrl-names = "default";
23 pinctrl-0 = <&pflash_default_pins>;
24 bank-width = <2>;
25 #address-cells = <1>;
26 #size-cells = <1>;
31 compatible = "cortina,gemini-syscon",
32 "syscon", "simple-mfd";
34 #clock-cells = <1>;
35 #reset-cells = <1>;
37 syscon-reboot {
38 compatible = "syscon-reboot";
47 compatible = "cortina,gemini-pinctrl";
50 pinctrl-names = "default";
51 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
54 dram_default_pins: pinctrl-dram {
60 rtc_default_pins: pinctrl-rtc {
66 power_default_pins: pinctrl-power {
72 cir_default_pins: pinctrl-cir {
78 system_default_pins: pinctrl-system {
84 vcontrol_default_pins: pinctrl-vcontrol {
90 ice_default_pins: pinctrl-ice {
96 uart_default_pins: pinctrl-uart {
102 pflash_default_pins: pinctrl-pflash {
108 usb_default_pins: pinctrl-usb {
114 gmii_default_pins: pinctrl-gmii {
127 pci_default_pins: pinctrl-pci {
133 sata_default_pins: pinctrl-sata {
135 function = "sata";
140 sata_and_ide_pins: pinctrl-sata-ide {
142 function = "sata";
150 tvc_default_pins: pinctrl-tvc {
160 compatible = "cortina,gemini-watchdog", "faraday,ftwdt010";
165 clock-names = "PCLK";
174 pinctrl-names = "default";
175 pinctrl-0 = <&uart_default_pins>;
176 reg-shift = <2>;
182 interrupt-parent = <&intcon>;
189 clock-names = "PCLK", "EXTCLK";
194 compatible = "cortina,gemini-rtc", "faraday,ftrtc010";
199 clock-names = "PCLK", "EXTCLK";
200 pinctrl-names = "default";
201 pinctrl-0 = <&rtc_default_pins>;
204 sata: sata@46000000 { label
205 compatible = "cortina,gemini-sata-bridge";
209 reset-names = "sata0", "sata1";
212 clock-names = "SATA0_PCLK", "SATA1_PCLK";
215 * to be explicitly enabled to enable the IDE pins,
218 pinctrl-names = "default", "ide";
219 pinctrl-0 = <&sata_default_pins>;
220 pinctrl-1 = <&sata_and_ide_pins>;
225 intcon: interrupt-controller@48000000 {
229 interrupt-controller;
230 #interrupt-cells = <2>;
233 power-controller@4b000000 {
234 compatible = "cortina,gemini-power-controller";
237 pinctrl-names = "default";
238 pinctrl-0 = <&power_default_pins>;
242 compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
247 gpio-controller;
248 #gpio-cells = <2>;
249 interrupt-controller;
250 #interrupt-cells = <2>;
254 compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
259 gpio-controller;
260 #gpio-cells = <2>;
261 interrupt-controller;
262 #interrupt-cells = <2>;
266 compatible = "cortina,gemini-gpio", "faraday,ftgpio010";
271 gpio-controller;
272 #gpio-cells = <2>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
278 compatible = "cortina,gemini-pci", "faraday,ftpci100";
281 * to configure the host bridge.
286 clock-names = "PCLK", "PCICLK";
287 pinctrl-names = "default";
288 pinctrl-0 = <&pci_default_pins>;
290 #address-cells = <3>;
291 #size-cells = <2>;
294 #interrupt-cells = <1>;
295 interrupt-map-mask = <0xf800 0 0 7>;
296 interrupt-map =
314 bus-range = <0x00 0xff>;
317 /* 1MiB I/O space 0x50000000-0x500fffff */
319 /* 128MiB non-prefetchable memory 0x58000000-0x5fffffff */
323 dma-ranges =
324 /* 128MiB at 0x00000000-0x07ffffff */
326 /* 64MiB at 0x00000000-0x03ffffff */
328 /* 64MiB at 0x00000000-0x03ffffff */
332 * This PCI host bridge variant has a cascaded interrupt
333 * controller embedded in the host bridge.
335 pci_intc: interrupt-controller {
336 interrupt-parent = <&intcon>;
338 interrupt-controller;
339 #address-cells = <0>;
340 #interrupt-cells = <1>;
345 compatible = "cortina,gemini-ethernet";
347 <0x60004000 0x2000>, /* V-bit */
348 <0x60006000 0x2000>; /* A-bit */
349 pinctrl-names = "default";
350 pinctrl-0 = <&gmii_default_pins>;
352 #address-cells = <1>;
353 #size-cells = <1>;
356 gmac0: ethernet-port@0 {
357 compatible = "cortina,gemini-ethernet-port";
360 interrupt-parent = <&intcon>;
364 clock-names = "PCLK";
367 gmac1: ethernet-port@1 {
368 compatible = "cortina,gemini-ethernet-port";
371 interrupt-parent = <&intcon>;
375 clock-names = "PCLK";
380 compatible = "cortina,sl3516-crypto";
388 compatible = "cortina,gemini-pata", "faraday,ftide010";
393 clock-names = "PCLK";
394 sata = <&sata>;
396 #address-cells = <1>;
397 #size-cells = <0>;
401 compatible = "cortina,gemini-pata", "faraday,ftide010";
406 clock-names = "PCLK";
407 sata = <&sata>;
409 #address-cells = <1>;
410 #size-cells = <0>;
413 dma-controller@67000000 {
416 arm,primecell-periphid = <0x0003b080>;
421 clock-names = "apb_pclk";
423 lli-bus-interface-ahb2;
424 mem-bus-interface-ahb2;
425 memcpy-burst-size = <256>;
426 memcpy-bus-width = <32>;
427 #dma-cells = <2>;
430 display-controller@6a000000 {
431 compatible = "cortina,gemini-tvc", "faraday,tve200";
437 clock-names = "PCLK", "TVE";
438 pinctrl-names = "default";
439 pinctrl-0 = <&tvc_default_pins>;
444 compatible = "cortina,gemini-usb", "faraday,fotg210";
449 clock-names = "PCLK";
458 pinctrl-names = "default";
459 pinctrl-0 = <&usb_default_pins>;
465 compatible = "cortina,gemini-usb", "faraday,fotg210";
470 clock-names = "PCLK";