Lines Matching +full:0 +full:x03880000
162 reg = <0x10d20000 0x1000>;
163 ranges = <0x0 0x10d20000 0x6000>;
168 reg = <0x4000 0x1000>;
173 reg = <0x5000 0x1000>;
179 reg = <0x10010000 0x30000>;
185 reg = <0x03810000 0x0C>;
195 reg = <0x11000000 0x10000>;
208 #size-cells = <0>;
209 reg = <0x12200000 0x2000>;
212 fifo-depth = <0x40>;
220 #size-cells = <0>;
221 reg = <0x12210000 0x2000>;
224 fifo-depth = <0x40>;
232 #size-cells = <0>;
233 reg = <0x12220000 0x1000>;
236 fifo-depth = <0x40>;
242 reg = <0x10c20000 0x10000>, <0x10c30000 0x10000>;
265 reg = <0x10CA1000 0x200>;
271 reg = <0x10CA1400 0x200>;
277 reg = <0x10CA1800 0x200>;
283 reg = <0x10CA1C00 0x200>;
289 reg = <0x11A51000 0x200>;
295 reg = <0x11A51400 0x200>;
301 reg = <0x10d00000 0x2000>;
305 ppmu_event3_dmc0_0: ppmu-event3-dmc0-0 {
306 event-name = "ppmu-event3-dmc0-0";
313 reg = <0x10d10000 0x2000>;
325 reg = <0x10d60000 0x2000>;
329 ppmu_event3_dmc1_0: ppmu-event3-dmc1-0 {
330 event-name = "ppmu-event3-dmc1-0";
337 reg = <0x10d70000 0x2000>;
349 reg = <0x10044000 0x20>;
350 #power-domain-cells = <0>;
356 reg = <0x10044020 0x20>;
357 #power-domain-cells = <0>;
363 reg = <0x10044060 0x20>;
364 #power-domain-cells = <0>;
370 reg = <0x10044080 0x20>;
371 #power-domain-cells = <0>;
377 reg = <0x100440C0 0x20>;
378 #power-domain-cells = <0>;
384 reg = <0x100440E0 0x20>;
385 #power-domain-cells = <0>;
391 reg = <0x10044120 0x20>;
392 #power-domain-cells = <0>;
398 reg = <0x13400000 0x1000>;
410 reg = <0x13410000 0x1000>;
416 reg = <0x14000000 0x1000>;
422 reg = <0x14010000 0x1000>;
428 reg = <0x03860000 0x1000>;
435 reg = <0x03880000 0x1000>;
445 reg = <0x121A0000 0x1000>;
454 reg = <0x121B0000 0x1000>;
463 reg = <0x10800000 0x1000>;
472 reg = <0x11C10000 0x1000>;
489 reg = <0x03830000 0x100>;
490 dmas = <&adma 0>,
501 samsung,idma-addr = <0x03000000>;
503 pinctrl-0 = <&i2s0_bus>;
510 reg = <0x12D60000 0x100>;
520 pinctrl-0 = <&i2s1_bus>;
526 reg = <0x12D70000 0x100>;
536 pinctrl-0 = <&i2s2_bus>;
542 reg = <0x12d20000 0x100>;
548 #size-cells = <0>;
550 pinctrl-0 = <&spi0_bus>;
558 reg = <0x12d30000 0x100>;
564 #size-cells = <0>;
566 pinctrl-0 = <&spi1_bus>;
574 reg = <0x12d40000 0x100>;
580 #size-cells = <0>;
582 pinctrl-0 = <&spi2_bus>;
591 #phy-cells = <0>;
602 reg = <0x14500000 0x10000>;
609 #size-cells = <0>;
615 reg = <0x12E00000 0x1000>;
618 #size-cells = <0>;
620 pinctrl-0 = <&i2c8_hs_bus>;
628 reg = <0x12E10000 0x1000>;
631 #size-cells = <0>;
633 pinctrl-0 = <&i2c9_hs_bus>;
641 reg = <0x12E20000 0x1000>;
644 #size-cells = <0>;
646 pinctrl-0 = <&i2c10_hs_bus>;
654 reg = <0x14530000 0x70000>;
665 #sound-dai-cells = <0>;
669 reg = <0x145D0000 0x20>;
674 reg = <0x101B0000 0x200>;
681 pinctrl-0 = <&hdmi_cec>;
687 reg = <0x14450000 0x10000>;
699 reg = <0x11C00000 0x64>;
708 reg = <0x13e00000 0x1000>;
718 reg = <0x13e10000 0x1000>;
728 reg = <0x11800000 0x5000>;
778 reg = <0x12800000 0x1294>;
779 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH>;
788 reg = <0x12810000 0x1294>;
789 interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
798 reg = <0x12820000 0x1294>;
799 interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>;
808 reg = <0x11F50000 0x1000>;
817 reg = <0x11F60000 0x1000>;
826 reg = <0x10040000 0x5000>;
837 reg = <0x10060000 0x100>;
841 #thermal-sensor-cells = <0>;
846 reg = <0x10064000 0x100>;
850 #thermal-sensor-cells = <0>;
855 reg = <0x10068000 0x100>, <0x1006c000 0x4>;
859 #thermal-sensor-cells = <0>;
864 reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
868 #thermal-sensor-cells = <0>;
873 reg = <0x100a0000 0x100>, <0x10068000 0x4>;
877 #thermal-sensor-cells = <0>;
882 reg = <0x10A60000 0x1000>;
887 #iommu-cells = <0>;
892 reg = <0x10A70000 0x1000>;
897 #iommu-cells = <0>;
902 reg = <0x14650000 0x1000>;
908 #iommu-cells = <0>;
913 reg = <0x13E80000 0x1000>;
915 interrupts = <2 0>;
919 #iommu-cells = <0>;
924 reg = <0x13E90000 0x1000>;
930 #iommu-cells = <0>;
935 reg = <0x12880000 0x1000>;
941 #iommu-cells = <0>;
946 reg = <0x12890000 0x1000>;
951 #iommu-cells = <0>;
956 reg = <0x128A0000 0x1000>;
961 #iommu-cells = <0>;
966 reg = <0x128C0000 0x1000>;
972 #iommu-cells = <0>;
977 reg = <0x128D0000 0x1000>;
983 #iommu-cells = <0>;
988 reg = <0x128E0000 0x1000>;
994 #iommu-cells = <0>;
999 reg = <0x11D40000 0x1000>;
1001 interrupts = <4 0>;
1004 #iommu-cells = <0>;
1009 reg = <0x11F10000 0x1000>;
1014 #iommu-cells = <0>;
1019 reg = <0x11F20000 0x1000>;
1023 #iommu-cells = <0>;
1028 reg = <0x11200000 0x1000>;
1034 #iommu-cells = <0>;
1039 reg = <0x11210000 0x1000>;
1045 #iommu-cells = <0>;
1050 reg = <0x14640000 0x1000>;
1056 #iommu-cells = <0>;
1061 reg = <0x14680000 0x1000>;
1063 interrupts = <3 0>;
1067 #iommu-cells = <0>;
1241 pinctrl-0 = <&i2c0_bus>;
1248 pinctrl-0 = <&i2c1_bus>;
1255 pinctrl-0 = <&i2c2_bus>;
1262 pinctrl-0 = <&i2c3_bus>;
1269 pinctrl-0 = <&i2c4_hs_bus>;
1276 pinctrl-0 = <&i2c5_hs_bus>;
1283 pinctrl-0 = <&i2c6_hs_bus>;
1290 pinctrl-0 = <&i2c7_hs_bus>;