Lines Matching +full:reg +full:- +full:names
1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a15";
67 reg = <0>;
69 clock-names = "cpu";
70 operating-points-v2 = <&cpu0_opp_table>;
71 #cooling-cells = <2>; /* min followed by max */
75 compatible = "arm,cortex-a15";
76 reg = <1>;
78 clock-names = "cpu";
79 operating-points-v2 = <&cpu0_opp_table>;
80 #cooling-cells = <2>; /* min followed by max */
84 cpu0_opp_table: opp-table0 {
85 compatible = "operating-points-v2";
86 opp-shared;
88 opp-200000000 {
89 opp-hz = /bits/ 64 <200000000>;
90 opp-microvolt = <925000>;
91 clock-latency-ns = <140000>;
93 opp-300000000 {
94 opp-hz = /bits/ 64 <300000000>;
95 opp-microvolt = <937500>;
96 clock-latency-ns = <140000>;
98 opp-400000000 {
99 opp-hz = /bits/ 64 <400000000>;
100 opp-microvolt = <950000>;
101 clock-latency-ns = <140000>;
103 opp-500000000 {
104 opp-hz = /bits/ 64 <500000000>;
105 opp-microvolt = <975000>;
106 clock-latency-ns = <140000>;
108 opp-600000000 {
109 opp-hz = /bits/ 64 <600000000>;
110 opp-microvolt = <1000000>;
111 clock-latency-ns = <140000>;
113 opp-700000000 {
114 opp-hz = /bits/ 64 <700000000>;
115 opp-microvolt = <1012500>;
116 clock-latency-ns = <140000>;
118 opp-800000000 {
119 opp-hz = /bits/ 64 <800000000>;
120 opp-microvolt = <1025000>;
121 clock-latency-ns = <140000>;
123 opp-900000000 {
124 opp-hz = /bits/ 64 <900000000>;
125 opp-microvolt = <1050000>;
126 clock-latency-ns = <140000>;
128 opp-1000000000 {
129 opp-hz = /bits/ 64 <1000000000>;
130 opp-microvolt = <1075000>;
131 clock-latency-ns = <140000>;
132 opp-suspend;
134 opp-1100000000 {
135 opp-hz = /bits/ 64 <1100000000>;
136 opp-microvolt = <1100000>;
137 clock-latency-ns = <140000>;
139 opp-1200000000 {
140 opp-hz = /bits/ 64 <1200000000>;
141 opp-microvolt = <1125000>;
142 clock-latency-ns = <140000>;
144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
146 opp-microvolt = <1150000>;
147 clock-latency-ns = <140000>;
149 opp-1400000000 {
150 opp-hz = /bits/ 64 <1400000000>;
151 opp-microvolt = <1200000>;
152 clock-latency-ns = <140000>;
154 opp-1500000000 {
155 opp-hz = /bits/ 64 <1500000000>;
156 opp-microvolt = <1225000>;
157 clock-latency-ns = <140000>;
159 opp-1600000000 {
160 opp-hz = /bits/ 64 <1600000000>;
161 opp-microvolt = <1250000>;
162 clock-latency-ns = <140000>;
164 opp-1700000000 {
165 opp-hz = /bits/ 64 <1700000000>;
166 opp-microvolt = <1300000>;
167 clock-latency-ns = <140000>;
172 compatible = "arm,cortex-a15-pmu";
173 interrupt-parent = <&combiner>;
179 compatible = "mmio-sram";
180 reg = <0x02020000 0x30000>;
181 #address-cells = <1>;
182 #size-cells = <1>;
185 smp-sram@0 {
186 compatible = "samsung,exynos4210-sysram";
187 reg = <0x0 0x1000>;
190 smp-sram@2f000 {
191 compatible = "samsung,exynos4210-sysram-ns";
192 reg = <0x2f000 0x1000>;
196 pd_gsc: power-domain@10044000 {
197 compatible = "samsung,exynos4210-pd";
198 reg = <0x10044000 0x20>;
199 #power-domain-cells = <0>;
203 pd_mfc: power-domain@10044040 {
204 compatible = "samsung,exynos4210-pd";
205 reg = <0x10044040 0x20>;
206 #power-domain-cells = <0>;
210 pd_g3d: power-domain@10044060 {
211 compatible = "samsung,exynos4210-pd";
212 reg = <0x10044060 0x20>;
213 #power-domain-cells = <0>;
217 pd_disp1: power-domain@100440a0 {
218 compatible = "samsung,exynos4210-pd";
219 reg = <0x100440A0 0x20>;
220 #power-domain-cells = <0>;
224 pd_mau: power-domain@100440c0 {
225 compatible = "samsung,exynos4210-pd";
226 reg = <0x100440C0 0x20>;
227 #power-domain-cells = <0>;
231 clock: clock-controller@10010000 {
232 compatible = "samsung,exynos5250-clock";
233 reg = <0x10010000 0x30000>;
234 #clock-cells = <1>;
237 clock_audss: audss-clock-controller@3810000 {
238 compatible = "samsung,exynos5250-audss-clock";
239 reg = <0x03810000 0x0C>;
240 #clock-cells = <1>;
243 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
244 power-domains = <&pd_mau>;
248 compatible = "samsung,exynos5250-mct",
249 "samsung,exynos4210-mct";
250 reg = <0x101C0000 0x800>;
252 clock-names = "fin_pll", "mct";
253 interrupts-extended = <&combiner 23 3>,
262 compatible = "samsung,exynos5250-pinctrl";
263 reg = <0x11400000 0x1000>;
266 wakup_eint: wakeup-interrupt-controller {
267 compatible = "samsung,exynos4210-wakeup-eint";
268 interrupt-parent = <&gic>;
274 compatible = "samsung,exynos5250-pinctrl";
275 reg = <0x13400000 0x1000>;
280 compatible = "samsung,exynos5250-pinctrl";
281 reg = <0x10d10000 0x1000>;
286 compatible = "samsung,exynos5250-pinctrl";
287 reg = <0x03860000 0x1000>;
289 power-domains = <&pd_mau>;
292 pmu_system_controller: system-controller@10040000 {
293 compatible = "samsung,exynos5250-pmu", "syscon";
294 reg = <0x10040000 0x5000>;
295 clock-names = "clkout16";
297 #clock-cells = <1>;
298 interrupt-controller;
299 #interrupt-cells = <3>;
300 interrupt-parent = <&gic>;
304 compatible = "samsung,exynos5250-wdt";
305 reg = <0x101D0000 0x100>;
308 clock-names = "watchdog";
309 samsung,syscon-phandle = <&pmu_system_controller>;
313 compatible = "samsung,mfc-v6";
314 reg = <0x11000000 0x10000>;
316 power-domains = <&pd_mfc>;
318 clock-names = "mfc";
320 iommu-names = "left", "right";
324 compatible = "samsung,exynos5250-rotator";
325 reg = <0x11C00000 0x64>;
328 clock-names = "rotator";
333 compatible = "samsung,exynos5250-mali", "arm,mali-t604";
334 reg = <0x11800000 0x5000>;
338 interrupt-names = "job", "mmu", "gpu";
340 clock-names = "core";
341 operating-points-v2 = <&gpu_opp_table>;
342 power-domains = <&pd_g3d>;
345 gpu_opp_table: opp-table {
346 compatible = "operating-points-v2";
348 opp-100000000 {
349 opp-hz = /bits/ 64 <100000000>;
350 opp-microvolt = <925000>;
352 opp-160000000 {
353 opp-hz = /bits/ 64 <160000000>;
354 opp-microvolt = <925000>;
356 opp-266000000 {
357 opp-hz = /bits/ 64 <266000000>;
358 opp-microvolt = <1025000>;
360 opp-350000000 {
361 opp-hz = /bits/ 64 <350000000>;
362 opp-microvolt = <1075000>;
364 opp-400000000 {
365 opp-hz = /bits/ 64 <400000000>;
366 opp-microvolt = <1125000>;
368 opp-450000000 {
369 opp-hz = /bits/ 64 <450000000>;
370 opp-microvolt = <1150000>;
372 opp-533000000 {
373 opp-hz = /bits/ 64 <533000000>;
374 opp-microvolt = <1250000>;
380 compatible = "samsung,exynos5250-tmu";
381 reg = <0x10060000 0x100>;
384 clock-names = "tmu_apbif";
385 #thermal-sensor-cells = <0>;
389 compatible = "snps,dwc-ahci";
390 reg = <0x122F0000 0x1ff>;
393 clock-names = "sata", "sclk_sata";
395 phy-names = "sata-phy";
396 ports-implemented = <0x1>;
400 sata_phy: sata-phy@12170000 {
401 compatible = "samsung,exynos5250-sata-phy";
402 reg = <0x12170000 0x1ff>;
404 clock-names = "sata_phyctrl";
405 #phy-cells = <0>;
406 samsung,syscon-phandle = <&pmu_system_controller>;
410 /* i2c_0-3 are defined in exynos5.dtsi */
412 compatible = "samsung,s3c2440-i2c";
413 reg = <0x12CA0000 0x100>;
415 #address-cells = <1>;
416 #size-cells = <0>;
418 clock-names = "i2c";
419 pinctrl-names = "default";
420 pinctrl-0 = <&i2c4_bus>;
425 compatible = "samsung,s3c2440-i2c";
426 reg = <0x12CB0000 0x100>;
428 #address-cells = <1>;
429 #size-cells = <0>;
431 clock-names = "i2c";
432 pinctrl-names = "default";
433 pinctrl-0 = <&i2c5_bus>;
438 compatible = "samsung,s3c2440-i2c";
439 reg = <0x12CC0000 0x100>;
441 #address-cells = <1>;
442 #size-cells = <0>;
444 clock-names = "i2c";
445 pinctrl-names = "default";
446 pinctrl-0 = <&i2c6_bus>;
451 compatible = "samsung,s3c2440-i2c";
452 reg = <0x12CD0000 0x100>;
454 #address-cells = <1>;
455 #size-cells = <0>;
457 clock-names = "i2c";
458 pinctrl-names = "default";
459 pinctrl-0 = <&i2c7_bus>;
464 compatible = "samsung,s3c2440-hdmiphy-i2c";
465 reg = <0x12CE0000 0x1000>;
467 #address-cells = <1>;
468 #size-cells = <0>;
470 clock-names = "i2c";
474 compatible = "samsung,exynos4212-hdmiphy";
475 reg = <0x38>;
480 compatible = "samsung,exynos5-sata-phy-i2c";
481 reg = <0x121D0000 0x100>;
482 #address-cells = <1>;
483 #size-cells = <0>;
485 clock-names = "i2c";
488 sata_phy_i2c: sata-phy-i2c@38 {
489 compatible = "samsung,exynos-sataphy-i2c";
490 reg = <0x38>;
496 compatible = "samsung,exynos4210-spi";
498 reg = <0x12d20000 0x100>;
501 dma-names = "tx", "rx";
502 #address-cells = <1>;
503 #size-cells = <0>;
505 clock-names = "spi", "spi_busclk0";
506 pinctrl-names = "default";
507 pinctrl-0 = <&spi0_bus>;
511 compatible = "samsung,exynos4210-spi";
513 reg = <0x12d30000 0x100>;
516 dma-names = "tx", "rx";
517 #address-cells = <1>;
518 #size-cells = <0>;
520 clock-names = "spi", "spi_busclk0";
521 pinctrl-names = "default";
522 pinctrl-0 = <&spi1_bus>;
526 compatible = "samsung,exynos4210-spi";
528 reg = <0x12d40000 0x100>;
531 dma-names = "tx", "rx";
532 #address-cells = <1>;
533 #size-cells = <0>;
535 clock-names = "spi", "spi_busclk0";
536 pinctrl-names = "default";
537 pinctrl-0 = <&spi2_bus>;
541 compatible = "samsung,exynos5250-dw-mshc";
543 #address-cells = <1>;
544 #size-cells = <0>;
545 reg = <0x12200000 0x1000>;
547 clock-names = "biu", "ciu";
548 fifo-depth = <0x80>;
553 compatible = "samsung,exynos5250-dw-mshc";
555 #address-cells = <1>;
556 #size-cells = <0>;
557 reg = <0x12210000 0x1000>;
559 clock-names = "biu", "ciu";
560 fifo-depth = <0x80>;
565 compatible = "samsung,exynos5250-dw-mshc";
567 #address-cells = <1>;
568 #size-cells = <0>;
569 reg = <0x12220000 0x1000>;
571 clock-names = "biu", "ciu";
572 fifo-depth = <0x80>;
577 compatible = "samsung,exynos5250-dw-mshc";
578 reg = <0x12230000 0x1000>;
580 #address-cells = <1>;
581 #size-cells = <0>;
583 clock-names = "biu", "ciu";
584 fifo-depth = <0x80>;
589 compatible = "samsung,s5pv210-i2s";
591 reg = <0x03830000 0x100>;
595 dma-names = "tx", "rx", "tx-sec";
599 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
600 samsung,idma-addr = <0x03000000>;
601 pinctrl-names = "default";
602 pinctrl-0 = <&i2s0_bus>;
603 power-domains = <&pd_mau>;
604 #clock-cells = <1>;
605 #sound-dai-cells = <1>;
609 compatible = "samsung,s3c6410-i2s";
611 reg = <0x12D60000 0x100>;
614 dma-names = "tx", "rx";
616 clock-names = "iis", "i2s_opclk0";
617 pinctrl-names = "default";
618 pinctrl-0 = <&i2s1_bus>;
619 power-domains = <&pd_mau>;
620 #sound-dai-cells = <1>;
624 compatible = "samsung,s3c6410-i2s";
626 reg = <0x12D70000 0x100>;
629 dma-names = "tx", "rx";
631 clock-names = "iis", "i2s_opclk0";
632 pinctrl-names = "default";
633 pinctrl-0 = <&i2s2_bus>;
634 power-domains = <&pd_mau>;
635 #sound-dai-cells = <1>;
639 compatible = "samsung,exynos5250-dwusb3";
641 clock-names = "usbdrd30";
642 #address-cells = <1>;
643 #size-cells = <1>;
648 reg = <0x12000000 0x10000>;
651 phy-names = "usb2-phy", "usb3-phy";
656 compatible = "samsung,exynos5250-usbdrd-phy";
657 reg = <0x12100000 0x100>;
659 clock-names = "phy", "ref";
660 samsung,pmu-syscon = <&pmu_system_controller>;
661 #phy-cells = <1>;
665 compatible = "samsung,exynos4210-ehci";
666 reg = <0x12110000 0x100>;
670 clock-names = "usbhost";
672 phy-names = "host";
676 compatible = "samsung,exynos4210-ohci";
677 reg = <0x12120000 0x100>;
681 clock-names = "usbhost";
683 phy-names = "host";
687 compatible = "samsung,exynos5250-usb2-phy";
688 reg = <0x12130000 0x100>;
690 clock-names = "phy", "ref";
691 #phy-cells = <1>;
692 samsung,sysreg-phandle = <&sysreg_system_controller>;
693 samsung,pmureg-phandle = <&pmu_system_controller>;
696 pdma0: dma-controller@121a0000 {
698 reg = <0x121A0000 0x1000>;
701 clock-names = "apb_pclk";
702 #dma-cells = <1>;
705 pdma1: dma-controller@121b0000 {
707 reg = <0x121B0000 0x1000>;
710 clock-names = "apb_pclk";
711 #dma-cells = <1>;
714 mdma0: dma-controller@10800000 {
716 reg = <0x10800000 0x1000>;
719 clock-names = "apb_pclk";
720 #dma-cells = <1>;
723 mdma1: dma-controller@11c10000 {
725 reg = <0x11C10000 0x1000>;
728 clock-names = "apb_pclk";
729 #dma-cells = <1>;
733 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
734 reg = <0x13e00000 0x1000>;
736 power-domains = <&pd_gsc>;
738 clock-names = "gscl";
743 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
744 reg = <0x13e10000 0x1000>;
746 power-domains = <&pd_gsc>;
748 clock-names = "gscl";
753 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
754 reg = <0x13e20000 0x1000>;
756 power-domains = <&pd_gsc>;
758 clock-names = "gscl";
763 compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";
764 reg = <0x13e30000 0x1000>;
766 power-domains = <&pd_gsc>;
768 clock-names = "gscl";
773 compatible = "samsung,exynos4212-hdmi";
774 reg = <0x14530000 0x70000>;
775 power-domains = <&pd_disp1>;
780 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
782 samsung,syscon-phandle = <&pmu_system_controller>;
784 #sound-dai-cells = <0>;
789 compatible = "samsung,s5p-cec";
790 reg = <0x101B0000 0x200>;
793 clock-names = "hdmicec";
794 samsung,syscon-phandle = <&pmu_system_controller>;
795 hdmi-phandle = <&hdmi>;
796 pinctrl-names = "default";
797 pinctrl-0 = <&hdmi_cec>;
802 compatible = "samsung,exynos5250-mixer";
803 reg = <0x14450000 0x10000>;
804 power-domains = <&pd_disp1>;
808 clock-names = "mixer", "hdmi", "sclk_hdmi";
813 dp_phy: video-phy-0 {
814 compatible = "samsung,exynos5250-dp-video-phy";
815 samsung,pmu-syscon = <&pmu_system_controller>;
816 #phy-cells = <0>;
819 mipi_phy: video-phy-1 {
820 compatible = "samsung,s5pv210-mipi-video-phy";
821 #phy-cells = <1>;
826 compatible = "samsung,exynos4210-mipi-dsi";
827 reg = <0x14500000 0x10000>;
829 samsung,power-domain = <&pd_disp1>;
831 phy-names = "dsim";
833 clock-names = "bus_clk", "sclk_mipi";
835 #address-cells = <1>;
836 #size-cells = <0>;
840 compatible = "samsung,exynos-adc-v1";
841 reg = <0x12D10000 0x100>;
844 clock-names = "adc";
845 #io-channel-cells = <1>;
846 samsung,syscon-phandle = <&pmu_system_controller>;
851 compatible = "samsung,exynos-sysmmu";
852 reg = <0x10A60000 0x1000>;
853 interrupt-parent = <&combiner>;
855 clock-names = "sysmmu", "master";
857 #iommu-cells = <0>;
861 compatible = "samsung,exynos-sysmmu";
862 reg = <0x11200000 0x1000>;
863 interrupt-parent = <&combiner>;
865 power-domains = <&pd_mfc>;
866 clock-names = "sysmmu", "master";
868 #iommu-cells = <0>;
872 compatible = "samsung,exynos-sysmmu";
873 reg = <0x11210000 0x1000>;
874 interrupt-parent = <&combiner>;
876 power-domains = <&pd_mfc>;
877 clock-names = "sysmmu", "master";
879 #iommu-cells = <0>;
883 compatible = "samsung,exynos-sysmmu";
884 reg = <0x11D40000 0x1000>;
885 interrupt-parent = <&combiner>;
887 clock-names = "sysmmu", "master";
889 #iommu-cells = <0>;
893 compatible = "samsung,exynos-sysmmu";
894 reg = <0x11F20000 0x1000>;
895 interrupt-parent = <&combiner>;
897 power-domains = <&pd_gsc>;
898 clock-names = "sysmmu", "master";
900 #iommu-cells = <0>;
904 compatible = "samsung,exynos-sysmmu";
905 reg = <0x13260000 0x1000>;
906 interrupt-parent = <&combiner>;
908 clock-names = "sysmmu";
910 #iommu-cells = <0>;
914 compatible = "samsung,exynos-sysmmu";
915 reg = <0x13270000 0x1000>;
916 interrupt-parent = <&combiner>;
918 clock-names = "sysmmu";
920 #iommu-cells = <0>;
924 compatible = "samsung,exynos-sysmmu";
925 reg = <0x132A0000 0x1000>;
926 interrupt-parent = <&combiner>;
928 clock-names = "sysmmu";
930 #iommu-cells = <0>;
934 compatible = "samsung,exynos-sysmmu";
935 reg = <0x13280000 0x1000>;
936 interrupt-parent = <&combiner>;
938 clock-names = "sysmmu";
940 #iommu-cells = <0>;
944 compatible = "samsung,exynos-sysmmu";
945 reg = <0x13290000 0x1000>;
946 interrupt-parent = <&combiner>;
948 clock-names = "sysmmu";
950 #iommu-cells = <0>;
954 compatible = "samsung,exynos-sysmmu";
955 reg = <0x132B0000 0x1000>;
956 interrupt-parent = <&combiner>;
958 clock-names = "sysmmu";
960 #iommu-cells = <0>;
964 compatible = "samsung,exynos-sysmmu";
965 reg = <0x132C0000 0x1000>;
966 interrupt-parent = <&combiner>;
968 clock-names = "sysmmu";
970 #iommu-cells = <0>;
974 compatible = "samsung,exynos-sysmmu";
975 reg = <0x132D0000 0x1000>;
976 interrupt-parent = <&combiner>;
978 clock-names = "sysmmu";
980 #iommu-cells = <0>;
984 compatible = "samsung,exynos-sysmmu";
985 reg = <0x132E0000 0x1000>;
986 interrupt-parent = <&combiner>;
988 clock-names = "sysmmu";
990 #iommu-cells = <0>;
994 compatible = "samsung,exynos-sysmmu";
995 reg = <0x132F0000 0x1000>;
996 interrupt-parent = <&combiner>;
998 clock-names = "sysmmu";
1000 #iommu-cells = <0>;
1004 compatible = "samsung,exynos-sysmmu";
1005 reg = <0x13C40000 0x1000>;
1006 interrupt-parent = <&combiner>;
1008 power-domains = <&pd_gsc>;
1009 clock-names = "sysmmu", "master";
1011 #iommu-cells = <0>;
1015 compatible = "samsung,exynos-sysmmu";
1016 reg = <0x13C50000 0x1000>;
1017 interrupt-parent = <&combiner>;
1019 power-domains = <&pd_gsc>;
1020 clock-names = "sysmmu", "master";
1022 #iommu-cells = <0>;
1026 compatible = "samsung,exynos-sysmmu";
1027 reg = <0x13E80000 0x1000>;
1028 interrupt-parent = <&combiner>;
1030 power-domains = <&pd_gsc>;
1031 clock-names = "sysmmu", "master";
1033 #iommu-cells = <0>;
1037 compatible = "samsung,exynos-sysmmu";
1038 reg = <0x13E90000 0x1000>;
1039 interrupt-parent = <&combiner>;
1041 power-domains = <&pd_gsc>;
1042 clock-names = "sysmmu", "master";
1044 #iommu-cells = <0>;
1048 compatible = "samsung,exynos-sysmmu";
1049 reg = <0x13EA0000 0x1000>;
1050 interrupt-parent = <&combiner>;
1052 power-domains = <&pd_gsc>;
1053 clock-names = "sysmmu", "master";
1055 #iommu-cells = <0>;
1059 compatible = "samsung,exynos-sysmmu";
1060 reg = <0x13EB0000 0x1000>;
1061 interrupt-parent = <&combiner>;
1063 power-domains = <&pd_gsc>;
1064 clock-names = "sysmmu", "master";
1066 #iommu-cells = <0>;
1070 compatible = "samsung,exynos-sysmmu";
1071 reg = <0x14640000 0x1000>;
1072 interrupt-parent = <&combiner>;
1074 power-domains = <&pd_disp1>;
1075 clock-names = "sysmmu", "master";
1077 #iommu-cells = <0>;
1081 compatible = "samsung,exynos-sysmmu";
1082 reg = <0x14650000 0x1000>;
1083 interrupt-parent = <&combiner>;
1085 power-domains = <&pd_disp1>;
1086 clock-names = "sysmmu", "master";
1088 #iommu-cells = <0>;
1093 compatible = "arm,armv7-timer";
1100 * of U-Boot on Exynos don't set the CNTFRQ register,
1103 clock-frequency = <24000000>;
1108 polling-delay-passive = <0>;
1109 polling-delay = <0>;
1110 thermal-sensors = <&tmu 0>;
1112 cooling-maps {
1115 cooling-device = <&cpu0 9 9>, <&cpu1 9 9>;
1119 cooling-device = <&cpu0 15 15>,
1126 power-domains = <&pd_disp1>;
1128 clock-names = "dp";
1130 phy-names = "dp";
1134 power-domains = <&pd_disp1>;
1136 clock-names = "sclk_fimd", "fimd";
1143 clock-names = "fimg2d";
1149 clock-names = "i2c";
1150 pinctrl-names = "default";
1151 pinctrl-0 = <&i2c0_bus>;
1156 clock-names = "i2c";
1157 pinctrl-names = "default";
1158 pinctrl-0 = <&i2c1_bus>;
1163 clock-names = "i2c";
1164 pinctrl-names = "default";
1165 pinctrl-0 = <&i2c2_bus>;
1170 clock-names = "i2c";
1171 pinctrl-names = "default";
1172 pinctrl-0 = <&i2c3_bus>;
1177 clock-names = "secss";
1182 clock-names = "timers";
1187 clock-names = "rtc";
1188 interrupt-parent = <&pmu_system_controller>;
1194 clock-names = "uart", "clk_uart_baud0";
1196 dma-names = "rx", "tx";
1201 clock-names = "uart", "clk_uart_baud0";
1203 dma-names = "rx", "tx";
1208 clock-names = "uart", "clk_uart_baud0";
1210 dma-names = "rx", "tx";
1215 clock-names = "uart", "clk_uart_baud0";
1217 dma-names = "rx", "tx";
1222 clock-names = "secss";
1227 clock-names = "secss";
1230 #include "exynos5250-pinctrl.dtsi"
1231 #include "exynos-syscon-restart.dtsi"