Lines Matching +full:no +full:- +full:map
1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/en7523-clk.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <1>;
11 #size-cells = <1>;
13 reserved-memory {
14 #address-cells = <1>;
15 #size-cells = <1>;
19 no-map;
24 no-map;
29 no-map;
34 no-map;
39 no-map;
45 compatible = "arm,psci-0.2";
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a53";
68 enable-method = "psci";
69 clock-frequency = <80000000>;
70 next-level-cache = <&L2_0>;
75 compatible = "arm,cortex-a53";
77 enable-method = "psci";
78 clock-frequency = <80000000>;
79 next-level-cache = <&L2_0>;
82 L2_0: l2-cache0 {
87 scu: system-controller@1fa20000 {
88 compatible = "airoha,en7523-scu";
91 #clock-cells = <1>;
94 gic: interrupt-controller@9000000 {
95 compatible = "arm,gic-v3";
96 interrupt-controller;
97 #interrupt-cells = <3>;
98 #address-cells = <1>;
99 #size-cells = <1>;
109 compatible = "arm,armv8-timer";
110 interrupt-parent = <&gic>;
120 reg-io-width = <4>;
121 reg-shift = <2>;
123 clock-frequency = <1843200>;
128 compatible = "airoha,en7523-gpio";
133 gpio-controller;
134 #gpio-cells = <2>;
138 compatible = "airoha,en7523-gpio";
143 gpio-controller;
144 #gpio-cells = <2>;
148 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
151 reg-names = "port0";
152 linux,pci-domain = <0>;
153 #address-cells = <3>;
154 #size-cells = <2>;
156 interrupt-names = "pcie_irq";
158 clock-names = "sys_ck0";
159 bus-range = <0x00 0xff>;
163 #interrupt-cells = <1>;
164 interrupt-map-mask = <0 0 0 7>;
165 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
169 pcie_intc0: interrupt-controller {
170 interrupt-controller;
171 #address-cells = <0>;
172 #interrupt-cells = <1>;
177 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
180 reg-names = "port1";
181 linux,pci-domain = <1>;
182 #address-cells = <3>;
183 #size-cells = <2>;
185 interrupt-names = "pcie_irq";
187 clock-names = "sys_ck1";
188 bus-range = <0x00 0xff>;
192 #interrupt-cells = <1>;
193 interrupt-map-mask = <0 0 0 7>;
194 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
198 pcie_intc1: interrupt-controller {
199 interrupt-controller;
200 #address-cells = <0>;
201 #interrupt-cells = <1>;