Lines Matching +full:davinci +full:- +full:gpio +full:- +full:unbanked
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
35 opp_100: opp100-100000000 {
36 opp-hz = /bits/ 64 <100000000>;
37 opp-microvolt = <1000000 950000 1050000>;
40 opp_200: opp110-200000000 {
41 opp-hz = /bits/ 64 <200000000>;
42 opp-microvolt = <1100000 1050000 1160000>;
45 opp_300: opp120-300000000 {
46 opp-hz = /bits/ 64 <300000000>;
47 opp-microvolt = <1200000 1140000 1320000>;
52 * need to be enabled on a per-board basis if the chip is
56 opp_375: opp120-375000000 {
58 opp-hz = /bits/ 64 <375000000>;
59 opp-microvolt = <1200000 1140000 1320000>;
62 opp_456: opp130-456000000 {
64 opp-hz = /bits/ 64 <456000000>;
65 opp-microvolt = <1300000 1250000 1350000>;
70 #address-cells = <1>;
71 #size-cells = <1>;
73 intc: interrupt-controller@fffee000 {
74 compatible = "ti,cp-intc";
75 interrupt-controller;
76 #interrupt-cells = <1>;
77 ti,intc-size = <101>;
83 compatible = "fixed-clock";
84 #clock-cells = <0>;
85 clock-output-names = "ref_clk";
88 compatible = "fixed-clock";
89 #clock-cells = <0>;
90 clock-output-names = "sata_refclk";
94 compatible = "fixed-clock";
95 #clock-cells = <0>;
96 clock-output-names = "usb_refclkin";
101 compatible = "ti,da850-dsp";
107 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
108 interrupt-parent = <&intc>;
115 compatible = "simple-bus";
117 #address-cells = <1>;
118 #size-cells = <1>;
120 interrupt-parent = <&intc>;
122 psc0: clock-controller@10000 {
123 compatible = "ti,da850-psc0";
125 #clock-cells = <1>;
126 #reset-cells = <1>;
127 #power-domain-cells = <1>;
131 clock-names = "pll0_sysclk1", "pll0_sysclk2",
135 pll0: clock-controller@11000 {
136 compatible = "ti,da850-pll0";
139 clock-names = "clksrc", "extclksrc";
142 #clock-cells = <0>;
145 #clock-cells = <1>;
148 #clock-cells = <0>;
151 #clock-cells = <0>;
155 compatible = "pinctrl-single";
157 #pinctrl-cells = <2>;
158 pinctrl-single,bit-per-mux;
159 pinctrl-single,register-width = <32>;
160 pinctrl-single,function-mask = <0xf>;
161 /* pin base, nr pins & gpio function */
162 pinctrl-single,gpio-range = <&range 0 17 0x8>,
169 range: gpio-range {
170 #pinctrl-single,gpio-range-cells = <3>;
174 pinctrl-single,bits = <
180 pinctrl-single,bits = <
186 pinctrl-single,bits = <
192 pinctrl-single,bits = <
198 pinctrl-single,bits = <
204 pinctrl-single,bits = <
210 pinctrl-single,bits = <
216 pinctrl-single,bits = <
222 pinctrl-single,bits = <
231 pinctrl-single,bits = <
237 pinctrl-single,bits = <
243 pinctrl-single,bits = <
249 pinctrl-single,bits = <
255 pinctrl-single,bits = <
261 pinctrl-single,bits = <
267 pinctrl-single,bits = <
273 pinctrl-single,bits = <
279 pinctrl-single,bits = <
285 pinctrl-single,bits = <
291 pinctrl-single,bits = <
297 pinctrl-single,bits = <
303 pinctrl-single,bits = <
309 pinctrl-single,bits = <
325 pinctrl-single,bits = <
346 pinctrl-single,bits = <
356 pinctrl-single,bits = <
371 prictrl: priority-controller@14110 {
372 compatible = "ti,da850-mstpri";
376 cfgchip: chip-controller@1417c {
377 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
380 usb_phy: usb-phy {
381 compatible = "ti,da830-usb-phy";
382 #phy-cells = <1>;
384 clock-names = "usb0_clk48", "usb1_clk48";
387 usb_phy_clk: usb-phy-clocks {
388 compatible = "ti,da830-usb-phy-clocks";
389 #clock-cells = <1>;
392 clock-names = "fck", "usb_refclkin", "auxclk";
395 compatible = "ti,da830-tbclksync";
396 #clock-cells = <0>;
398 clock-names = "fck";
401 compatible = "ti,da830-div4p5ena";
402 #clock-cells = <0>;
404 clock-names = "pll0_pllout";
407 compatible = "ti,da850-async1-clksrc";
408 #clock-cells = <0>;
410 clock-names = "pll0_sysclk3", "div4.5";
413 compatible = "ti,da850-async3-clksrc";
414 #clock-cells = <0>;
416 clock-names = "pll0_sysclk2", "pll1_sysclk2";
420 compatible = "ti,edma3-tpcc";
421 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
423 reg-names = "edma3_cc";
425 interrupt-names = "edma3_ccint", "edma3_ccerrint";
426 #dma-cells = <2>;
429 power-domains = <&psc0 0>;
432 compatible = "ti,edma3-tptc";
435 interrupt-names = "edm3_tcerrint";
436 power-domains = <&psc0 1>;
439 compatible = "ti,edma3-tptc";
442 interrupt-names = "edm3_tcerrint";
443 power-domains = <&psc0 2>;
446 compatible = "ti,edma3-tpcc";
447 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
449 reg-names = "edma3_cc";
451 interrupt-names = "edma3_ccint", "edma3_ccerrint";
452 #dma-cells = <2>;
455 power-domains = <&psc1 0>;
458 compatible = "ti,edma3-tptc";
461 interrupt-names = "edm3_tcerrint";
462 power-domains = <&psc1 21>;
465 compatible = "ti,da830-uart", "ns16550a";
467 reg-io-width = <4>;
468 reg-shift = <2>;
471 power-domains = <&psc0 9>;
475 compatible = "ti,da830-uart", "ns16550a";
477 reg-io-width = <4>;
478 reg-shift = <2>;
481 power-domains = <&psc1 12>;
485 compatible = "ti,da830-uart", "ns16550a";
487 reg-io-width = <4>;
488 reg-shift = <2>;
491 power-domains = <&psc1 13>;
495 compatible = "ti,da830-rtc";
500 clock-names = "int-clk";
504 compatible = "ti,davinci-i2c";
507 #address-cells = <1>;
508 #size-cells = <0>;
513 compatible = "ti,davinci-i2c";
516 #address-cells = <1>;
517 #size-cells = <0>;
519 power-domains = <&psc1 11>;
523 compatible = "ti,da830-timer";
526 interrupt-names = "tint12", "tint34";
530 compatible = "ti,davinci-wdt";
536 compatible = "ti,da830-mmc";
538 cap-sd-highspeed;
539 cap-mmc-highspeed;
542 dma-names = "rx", "tx";
547 compatible = "ti,da850-vpif";
550 power-domains = <&psc1 9>;
555 #address-cells = <1>;
556 #size-cells = <0>;
561 #address-cells = <1>;
562 #size-cells = <0>;
566 compatible = "ti,da830-mmc";
568 cap-sd-highspeed;
569 cap-mmc-highspeed;
572 dma-names = "rx", "tx";
577 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm";
578 #pwm-cells = <3>;
581 clock-names = "fck", "tbclk";
582 power-domains = <&psc1 17>;
586 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm";
587 #pwm-cells = <3>;
590 clock-names = "fck", "tbclk";
591 power-domains = <&psc1 17>;
595 compatible = "ti,da850-ecap", "ti,am3352-ecap";
596 #pwm-cells = <3>;
599 clock-names = "fck";
600 power-domains = <&psc1 20>;
604 compatible = "ti,da850-ecap", "ti,am3352-ecap";
605 #pwm-cells = <3>;
608 clock-names = "fck";
609 power-domains = <&psc1 20>;
613 compatible = "ti,da850-ecap", "ti,am3352-ecap";
614 #pwm-cells = <3>;
617 clock-names = "fck";
618 power-domains = <&psc1 20>;
622 #address-cells = <1>;
623 #size-cells = <0>;
624 compatible = "ti,da830-spi";
626 num-cs = <6>;
627 ti,davinci-spi-intr-line = <1>;
630 dma-names = "rx", "tx";
632 power-domains = <&psc0 4>;
636 #address-cells = <1>;
637 #size-cells = <0>;
638 compatible = "ti,da830-spi";
640 num-cs = <4>;
641 ti,davinci-spi-intr-line = <1>;
644 dma-names = "rx", "tx";
646 power-domains = <&psc1 10>;
650 compatible = "ti,da830-musb";
654 interrupt-names = "mc";
657 phy-names = "usb-phy";
659 clock-ranges;
662 #address-cells = <1>;
663 #size-cells = <1>;
669 dma-names =
673 cppi41dma: dma-controller@201000 {
674 compatible = "ti,da830-cppi41";
678 reg-names = "controller",
681 #dma-cells = <2>;
683 #dma-channels = <4>;
684 dma-channels = <4>;
685 power-domains = <&psc1 1>;
690 compatible = "ti,da850-ahci";
694 clock-names = "fck", "refclk";
697 pll1: clock-controller@21a000 {
698 compatible = "ti,da850-pll1";
701 clock-names = "clksrc";
704 #clock-cells = <1>;
707 #clock-cells = <0>;
712 #address-cells = <1>;
713 #size-cells = <0>;
716 clock-names = "fck";
717 power-domains = <&psc1 5>;
721 compatible = "ti,davinci-dm6467-emac";
723 ti,davinci-ctrl-reg-offset = <0x3000>;
724 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
725 ti,davinci-ctrl-ram-offset = <0>;
726 ti,davinci-ctrl-ram-size = <0x2000>;
727 local-mac-address = [ 00 00 00 00 00 00 ];
734 power-domains = <&psc1 5>;
738 compatible = "ti,da830-ohci";
742 phy-names = "usb-phy";
746 gpio: gpio@226000 { label
747 compatible = "ti,dm6441-gpio";
748 gpio-controller;
749 #gpio-cells = <2>;
753 ti,davinci-gpio-unbanked = <0>;
755 clock-names = "gpio";
757 interrupt-controller;
758 #interrupt-cells = <2>;
759 gpio-ranges = <&pmx_core 0 15 1>,
904 psc1: clock-controller@227000 {
905 compatible = "ti,da850-psc1";
907 #clock-cells = <1>;
908 #power-domain-cells = <1>;
911 clock-names = "pll0_sysclk2", "pll0_sysclk4", "async3";
912 assigned-clocks = <&async3_clk>;
913 assigned-clock-parents = <&pll1_sysclk 2>;
915 pinconf: pin-controller@22c00c {
916 compatible = "ti,da850-pupd";
922 compatible = "ti,da830-mcasp-audio";
925 reg-names = "mpu", "dat";
927 interrupt-names = "common";
928 power-domains = <&psc1 7>;
932 dma-names = "tx", "rx";
936 compatible = "ti,da850-tilcdc";
939 max-pixelclock = <37500>;
941 clock-names = "fck";
942 power-domains = <&psc1 16>;
947 compatible = "ti,da850-aemif";
948 #address-cells = <2>;
949 #size-cells = <1>;
955 clock-names = "aemif";
956 clock-ranges;
959 memctrl: memory-controller@b0000000 {
960 compatible = "ti,da850-ddr-controller";